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CompactFlash Card
SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
SST48CFxxxATA/IDE Standard CompactFlash Card 8MB / 16MB / 24MB / 32MB / 48MB / 64MB / 96MB / 128MB / 192MB / 256MB
Data Sheet
FEATURES:
* CompactFlash Association specification standard * 8, 16, 24, 32, 48, 64, 96, 128, 192, and 256 MByte capacities * Small Form Factor: 36.4 mm x 42.8 mm x 3.3 mm * Supports 5.0-Volt and 3.3-Volt Read and Write - 4.5-5.5V, 3.135-3.465V for commercial * PC Card ATA and True IDE interface - 512 Bytes sector - ATA command set compatible * Low Power Consumption: - Active mode: 35 mA/55 mA (3.3V/5.0V)(typical) - Sleep mode: 100 A/150 A (3.3V/5.0V)(typical) * Data Transfer Rate to/from Host - 20 MB/s burst at 5.0V - 6.6 MB/s burst at 3.3V * High Performance - Up to 1.4 MB/sec sustained write transfer rate (host to flash) * Controller Overhead Command to DRQ - Less than 0.5 ms * Zero Data Retention Power - Batteries not required for data storage * Start Up Time - Sleep to Read: 200 ns - Sleep to Write: 200 ns - Reset to Ready: 50 ms typical, 400 ms Max. * Support for Commercial Temperature Range - 0C to +70C for operating commercial - -25C to +85C non-operating (storage) * Extremely Rugged and Reliable - Built-in ECC support corrects 3 random Bytes error per 512 Byte sector - 2000 G operating and non-operating shock * Intelligent ATA/IDE Controller - Built-in microcontroller with intelligent firmware - 256 Bytes of attribute memory for storing CIS information - Supports multiple-sector Read/Write operation to enhance system performance * Power Management Unit - Immediate disabling of unused circuitry
PRODUCT DESCRIPTION
SST's CompactFlash (CF) card is an ultra-small, low cost, high performance, removable flash memory data storage system. This technology is well suited for solid state mass storage portable applications offering new and expanded functionality while enabling smaller and lighter designs. CompactFlash technology is widely used in a variety of consumer products such as portable computers, digital cameras, handheld data collection scanners, Personal Digital Assistants (PDAs), handy terminals, audio players, monitoring devices and set-top boxes. SST's CompactFlash products provide complete PCMCIAATA functionality and compatibility. This is achieved because the 50-pin CF card can be easily slipped into a passive 68-pin Type II adapter card that fully meets PCMCIA electrical and mechanical interface specifications. SST's CompactFlash products are also fully compliant with CFA standards. The SST CF card is read and written to using a single power supply of 5.0V or 3.3V and is available in 8 to 256 MByte densities. SST's CompactFlash cards contain additional attribute memory of 256 Bytes for storing the Card Information Structure (CIS) information. SST's CompactFlash card has built in microcontroller and file management firmware that communicates with ATA standard interfaces; therefore, the SST's CompactFlash cards do not require additional software for the host, such as Flash File System (FFS) and Memory Technology Driver (MTD).
(c)2001 Silicon Storage Technology, Inc. S71125-03-000 9/01 375 1
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. SST is an authorized licensee of the CompactFlashTM and CF[logo]TM trademarks. Some data and tables are reproduced from the CompactFlash Specification by permission of the CompactFlash Association. These specifications are subject to change without notice.
CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet
TABLE OF CONTENTS
PRODUCT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.0 GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1 Performance-optimized ATA Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1.1 1.1.2 1.1.3 1.1.4 1.1.5 1.1.6 Microcontroller Unit (MCU). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internal Direct Memory Access (DMA) Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Management Unit (PMU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SRAM Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Embedded Flash File System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Error Correction Code (ECC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5 5 5 5 5
1.2 SST's CompactFlash Card Product Offering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.0 ELECTRICAL INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.0.1 Pin Assignment and Pin Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 Electrical Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Card Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Electrical Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.3.1 Input Leakage Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.2 Input Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.3 Output Drive Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.4 Output Drive Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.5 Interface/Bus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.6 Attribute Memory Read Timing Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.7 Configuration Register (Attribute Memory) Write Timing specification. . . . . . . . . . . . . . . . . . . . . 2.3.8 Common Memory Read Timing Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.9 Common Memory Write Timing Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.10 I/O Input (Read) Timing Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.11 I/O Output (Write) Timing Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.12 True IDE Mode I/O Input (Read) Timing Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3.13 True IDE Mode I/O Output (Write) Timing Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4.1 2.4.2 2.4.3 2.4.4 2.4.5 Attribute Memory Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Configuration Option Register (Address 200H in Attribute Memory) . . . . . . . . . . . . . . . . . . . . . . Card Configuration and Status Register (Address 202H in Attribute Memory) . . . . . . . . . . . . . . Pin Replacement Register (Address 204H in Attribute Memory) . . . . . . . . . . . . . . . . . . . . . . . . . Socket and Copy Register (Address 206H in Attribute Memory) . . . . . . . . . . . . . . . . . . . . . . . . . 13 14 14 14 14 15 16 17 18 19 20 21 22 24 24 25 26 26
2.4 Card Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2.5 I/O Transfer Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 2.5.1 I/O Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 2.6 Common Memory Transfer Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 2.6.1 Common Memory Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 2.7 True IDE Mode I/O Transfer Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 2.7.1 True IDE Mode I/O Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
(c)2001 Silicon Storage Technology, Inc.
S71125-03-000 9/01
375
2
CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 3.0 SOFTWARE INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.1 CF-ATA Drive Register Set Definition and Protocol. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.1.1 3.1.2 3.1.3 3.1.4 3.1.5 I/O Primary and Secondary Address Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Contiguous I/O Mapped Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Memory Mapped Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . True IDE Mode Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CF-ATA Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.5.1 Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.5.2 Error Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.5.3 Feature Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.5.4 Sector Count Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.5.5 Sector Number (LBA 7-0) Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.5.6 Cylinder Low (LBA 15-8) Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.5.7 Cylinder High (LBA 23-16) Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.5.8 Drive/Head (LBA 27-24) Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.5.9 Status & Alternate Status Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.5.10 Device Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.5.11 Card (Drive) Address Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 31 32 33 33 33 34 34 34 34 34 34 35 36 36 37 37 39 39 40 40 40 42 42 42 42 42 42 42 42 42 42 42 42 42 42 43 43 43 43 43 43 43 43 43 43 44 44
375
3.2 CF-ATA Command Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 3.2.1 CF-ATA Command Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.1 Check Power Mode - 98H or E5H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.2 Execute Drive Diagnostic - 90H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.3 Erase Sector(s) - C0H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.4 Format Track - 50H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5 Identify Drive - ECH. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5.1 General Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5.2 Default Number of Cylinders. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5.3 Default Number of Heads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5.4 Number of Unformatted Bytes per Track . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5.5 Number of Unformatted Bytes per Sector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5.6 Default Number of Sectors per Track . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5.7 Number of Sectors per Card. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5.8 Memory Card Serial Number . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5.9 Buffer Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5.10 Buffer Size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5.11 ECC Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5.12 Firmware Revision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5.13 Model Number . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5.14 Read/Write Multiple Sector Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5.15 Capabilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5.16 PIO Data Transfer Cycle Timing Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5.17 Translation Parameters Valid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5.18 Current Number of Cylinders, Heads, Sectors/Track . . . . . . . . . . . . . . . . . . . 3.2.1.5.19 Current Capacity. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5.20 Multiple Sector Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5.21 Advanced PIO Data Transfer Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5.22 Minimum PIO Transfer Cycle Time Without Flow Control . . . . . . . . . . . . . . . 3.2.1.5.23 Minimum PIO Transfer Cycle Time With IORDY . . . . . . . . . . . . . . . . . . . . . . 3.2.1.5.24 Total Sectors Addressable in LBA Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.6 Idle - 97H or E3H. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.7 Idle Immediate - 95H or E1H. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(c)2001 Silicon Storage Technology, Inc. S71125-03-000 9/01
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 3.2.1.8 Initialize Drive Parameters - 91H. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.9 Read Buffer - E4H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.10 Read Multiple - C4H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.11 Read Long Sector - 22H or 23H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.12 Read Sector(s) - 20H or 21H. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.13 Read Verify Sector(s) - 40H or 41H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.14 Recalibrate - 1XH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.15 Request Sense - 03H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.16 Seek - 7XH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.17 Set Features - EFH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.18 Set Multiple Mode - C6H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.19 Set Sleep Mode- 99H or E6H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.20 Standby - 96H or E2H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.21 Standby Immediate - 94H or E0H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.22 Translate Sector - 87H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.23 Wear Level - F5H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.24 Write Buffer - E8H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.25 Write Long Sector - 32H or 33H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.26 Write Multiple Command - C5H. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.27 Write Multiple without Erase - CDH. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.28 Write Sector(s) - 30H or 31H. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.29 Write Sector(s) without Erase - 38H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.1.30 Write Verify - 3CH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.2 Error Posting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 45 45 46 46 47 47 47 48 48 49 50 50 50 51 51 52 52 53 54 54 55 55 56
4.0 APPENDIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 4.1 Differences between CF-ATA and PC Card-ATA/True IDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 4.1.1 Electrical Differences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1.1.1 TTL Compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1.1.2 Pull Up Resistor Input Leakage Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1.2 Functional Differences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1.2.1 Additional Set Features Codes in CF-ATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1.2.2 Additional Commands in CF-ATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1.2.3 Idle Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1.2.4 Recovery from Sleep Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 57 57 57 57 57 57 57
5.0 PHYSICAL DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 6.0 PRODUCT ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 6.1 Valid combinations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 7.0 LIMITED WARRANTY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 7.1 Life Support Policy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 8.0 PATENT PROTECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 9.0 PCMCIA STANDARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 10.0 COMPACTFLASH SPECIFICATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 11.0 RELATED DOCUMENTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet
1.0 GENERAL DESCRIPTION
The SST's CompactFlash card contains a controller, embedded firmware storage and flash media in a matchbook sized package with a 50-pin connector consisting of two rows of 25 female contacts each on 50 mil (1.27 mm) centers. Refer to Figure 1 for SST's CompactFlash card block diagram. The controller interfaces with the host system allowing data to be written to and read from the flash media.
1.1.3 Power Management Unit (PMU) Power Management Unit controls the power consumption of the CompactFlash card. The PMU dramatically extends product battery life by putting the part of the circuitry that is not in operation into sleep mode. 1.1.4 SRAM Buffer A key contributor to the ATA controller performance is a SRAM buffer. The buffer optimizes host's data writes to flash media. 1.1.5 Embedded Flash File System Embedded Flash File System is an integral part of the SST's ATM controller. It contains MCU firmware that performs the following tasks: 1. Translates host side signals into flash media Writes and Reads. 2. Provides flash media wear leveling to spread the flash writes across all the memory address space to increase the longevity of flash media. 3. Keeps track of data file structures. 1.1.6 Error Correction Code (ECC) The ATA Controller contains ECC algorithm that corrects 3 bytes of error per 512 Byte sector.
1.1 Performance-optimized ATA Controller
The heart of a CompactFlash card is the ATA controller which translates standard IDE/ATA signals into flash media data and controls. SST's CompactFlash card contains a proprietary ATA controller that was specifically designed to attain high data throughput from host to flash. The following components contribute to the ATA controller's performance. 1.1.1 Microcontroller Unit (MCU) The MCU translates IDE/ATA commands into data and control signals required for flash memory operation. 1.1.2 Internal Direct Memory Access (DMA) Control The ATA controller inside SST's CompactFlash card uses DMA allowing instant data transfer to memory. This implementation eliminates controller overhead associated with traditional, firmware based, memory control, increasing data transfer rate.
ATA Controller
Embedded Flash File System SRAM Buffer To Host ECC Internal DMA PMU
MCU
Flash Media
375 ILL1-1.4
FIGURE 1: SST COMPACTFLASH BLOCK DIAGRAM
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet
1.2 SST's CompactFlash Card Product Offering
The SST48CFxxx High CompactFlash product family is available in 8 to 256 MByte densities. The following table shows the specific capacity, default number of cylinder heads, sectors and cylinders for each product line.
.
Model Number SST48CF008 SST48CF016 SST48CF024 SST48CF032 SST48CF048 SST48CF064 SST48CF096 SST48CF128 SST48CF192 SST48CF256
Density 8 MB 16 MB 24 MB 32 MB 48 MB 64 MB 96 MB 128 MB 192 MB 256 MB
Total Bytes 8,028,160 16,023,552 24,051,712 32,047,104 48,037,888 64,028,672 96,075,776 128,057,344 192,151,552 256,114,688
Cylinders 245 489 367 489 733 977 733 977 733 977
Heads 2 2 4 4 4 4 8 8 16 16
Sectors 32 32 32 32 32 32 32 32 32 32
2.0 ELECTRICAL INTERFACE
2.0.1 Pin Assignment and Pin Type The signal/pin assignments are listed in Table 2-1. Low active signals have a "-" prefix. Pin types are Input, Output or Input/ Output. Section 2.3 defines the DC characteristics for all input and output type structures.
2.1 Electrical Description
The CompactFlash card functions in three basic modes: 1) PC Card ATA using I/O Mode, 2) PC Card ATA using Memory Mode and 3) True IDE Mode, which is compatible with most disk drives. The configuration of the CompactFlash card will be controlled using the standard PCMCIA configuration registers starting at address 200H in the Attribute Memory space of the storage card or for True IDE Mode, pin 9 being grounded. Table 2-2 describes the I/O signals. Signals whose source is the host are designated as inputs while signals that the CompactFlash card sources are outputs. The CompactFlash card logic levels conform to those specified in the PCMCIA Release 2.1 and CFA Specification Rev. 1.4. As shown in Table 2-2, each signal has three possible operating modes: 1) PC Card Memory, 2) PC Card I/O and 3) True IDE. All outputs from the card are totem pole except the data bus signals which are bidirectional tri-state. Refer to Section 2.3 for definitions of Input and Output type.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet
2.2 Card Pin Assignment
TABLE 2-1: CARD PIN ASSIGNMENT (1 OF 2)
Memory card mode Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Signal Name GND D3 D4 D5 D6 D7 -CE1 A10 -OE A9 A8 A7 VDD A6 A5 A4 A3 A2 A1 A0 D0 D1 D2 WP -CD2 -CD1 D11 D12 D13 D14 D15 -CE2 -VS1 -IORD -IOWR -WE RDY/-BSY VDD -CSEL -VS2 Pin Type I/O I/O I/O I/O I/O I I I I I I I I I I I I I I/O I/O I/O O O O I/O I/O I/O I/O I/O I O I I I O I O I/O Type1 GND I2D, O2 I2D, O2 I2D, O2 I2D, O2 I2D, O2 I3U I2D I3U I2D I2D I2D I2D I2D I2D I2D I2D I2D I2D I2D, O2 I2D, O2 I2D, O2 O2 Ground Ground I2D, O2 I2D, O2 I2D, O2 I2D, O2 I2D, O2 I3U Ground I3U I3U I3U O1 I2U open Signal Name GND D3 D4 D5 D6 D7 -CE1 A10 -OE A9 A8 A7 VDD A6 A5 A4 A3 A2 A1 A0 D0 D1 D2 -IOIS16 -CD2 -CD1 D11 D12 D13 D14 D15 -CE2 -VS1 -IORD -IOWR -WE -IREQ VDD -CSEL -VS2 I/O card mode Pin Type I/O I/O I/O I/O I/O I I I I I I I I I I I I I I/O I/O I/O O O O I/O I/O I/O I/O I/O I O I I I O I O I/O Type1 GND I2D, O2 I2D, O2 I2D, O2 I2D, O2 I2D, O2 I3U I2D I3U I2D I2D I2D I2D I2D I2D I2D I2D I2D I2D I2D, O2 I2D, O2 I2D, O2 O2 Ground Ground I2D, O2 I2D, O2 I2D, O2 I2D, O2 I2D, O2 I3U Ground I3U I3U I3U O1 I2U open Signal Name GND D3 D4 D5 D6 D7 -CS0 A10 -ATASEL A9 A8 A7 VDD A6 A5 A4 A3 A2 A1 A0 D0 D1 D2 -IOIS16 -CD2 -CD1 D11 D12 D13 D14 D15 -CS1 -VS1 -IORD -IOWR -WE INTRQ VDD -CSEL -VS2 True IDE mode Pin Type I/O I/O I/O I/O I/O I I I I I I I I I I I I I I/O I/O I/O O O O I/O I/O I/O I/O I/O I O I I I O I O I/O Type1 GND I2D, O2 I2D, O2 I2D, O2 I2D, O2 I2D, O2 I3U I2D I3U I2D I2D I2D I2D I2D I2D I2D I2D I2D I2D I2D, O2 I2D, O2 I2D, O2 O2 Ground Ground I2D, O2 I2D, O2 I2D, O2 I2D, O2 I2D, O2 I3U Ground I3U I3U I3U O1 I2U open
375
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet TABLE 2-1: CARD PIN ASSIGNMENT (CONTINUED) (2
Memory card mode Pin No. 41 42 43 44 45 46 47 48 49 50 Signal Name RESET -WAIT -INPACK -REG BVD2 BVD1 D8 D9 D10 GND Pin Type I O O I O O I/O I/O I/O I/O Type1 I4U O1 O1 I3U I2U, O1 I2U, O1 I2D, O2 I2D, O2 I2D, O2 GND Signal Name RESET -WAIT -INPACK -REG -SPKR -STSCHG D8 D9 D10 GND
OF
2)
True IDE mode I/O Type1 I4U O1 O1 I3U I2U, O1 I2U, O1 I2D, O2 I2D, O2 I2D, O2 GND Signal Name -RESET IORDY -INPACK -REG -DASP -PDIAG D8 D9 D10 GND Pin Type I O O I O O I/O I/O I/O I/O Type1 I4U O1 O1 I3U I2U, O1 I2U, O1 I2D, O2 I2D, O2 I2D, O2 GND
T2-1.2 375
I/O card mode Pin Type I O O I O O I/O I/O I/O -
1. Please refer to Sections 2.3.1 to 2.3.4 for detail.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet TABLE
Symbol A10 - A0 (PC Card Memory Mode)
2-2: SIGNAL DESCRIPTION (1 OF 4)
Type1 I Pin 8,10,11,12, 14,15,16,17, 18,19,20 Name and Functions These address lines along with the -REG signal are used to select the following: The I/O port address registers within the CompactFlash card, the memory mapped port address registers within the CompactFlash card, a byte in the card's information structure and its configuration control and status registers. This signal is the same as the PC Card Memory Mode signal I 18,19,20 In True IDE Mode only A[2:0] are used to select the one of eight (True IDE Mode) registers in the Task File, the remaining address lines should be grounded by the host. This signal is asserted high as the BVD1 signal since a battery is not used with this product. This signal is asserted low to alert the host to changes in the RDY/BSY and Write Protect states, while the I/O interface is configured. Its use is controlled by the Card Config and Status Register. In the True IDE Mode, this input/output is the Pass Diagnostic signal in the Master/Slave handshake protocol. I/O 45 This output line is always driven to a high state in Memory Mode since a battery is not required for this product. This output line is always driven to a high state in I/O Mode since this product does not support the audio function. In the True IDE Mode, this input/output is the Disk Active/Slave Present signal in the Master/Slave handshake protocol. O 26,25 These Card Detect pins are connected to ground on the CompactFlash card. They are used by the host to determine that the CompactFlash card is fully inserted into its socket. This signal is the same for all modes. This signal is the same for all modes. I 7,32 These input signals are used both to select the card and to indicate to the card whether a byte or a word operation is being performed. CE2 always accesses the Odd Byte of the word. -CE1 accesses the Even Byte or the Odd Byte of the word depending on A0 and -CE2. A multiplexing scheme based on A0, -CE1, -CE2 allows 8 bit hosts to access all data on D0-D7. See Tables 2-11, 2-13, 2-16, 2-17, and 2-18. This signal is the same as the PC Card Memory Mode signal.
A10 - A0 (PC Card I/O Mode) A2 - A0 (True IDE Mode BVD1 (PC Card Memory Mode) -STSCHG (PC Card I/O Mode) Status Changed -PDIAG (True IDE Mode) BVD2 (PC Card Memory Mode) -SPKR (PC Card I/O Mode) -DASP (True IDE Mode) -CD1, -CD2 (PC Card Memory Mode) -CD1, -CD2 (PC Card I/O Mode) -CD1, -CD2 (True IDE Mode) -CE1, -CE2 (PC Card Memory Mode) Card Enable
I/O
46
-CE1, -CE2 (PC Card I/O Mode) Card Enable -CS0, -CS1 (True IDE Mode)
In the True IDE Mode CS0 is the chip select for the task file registers while CS2 is used to select the Alternate Status Register and the Device Control Register.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet TABLE
Symbol -CSEL (PC Card Memory Mode) -CSEL (PC Card I/O Mode) -CSEL (True IDE Mode)
2-2: SIGNAL DESCRIPTION (CONTINUED) (2
Type1 I Pin 39
OF
4)
Name and Functions
This signal is not used for this mode. This signal is not used for this mode. This internally pulled up signal is used to configure this device as a Master or a Slave when configured in the True IDE Mode. When this pin is grounded, this device is configured as a Master. When the pin is open, this device is configured as a Slave.
D15 - D00 (PC Card Memory Mode) D15 - D00 (PC Card I/O Mode) D15 - D00 (True IDE Mode) GND (PC Card Memory Mode) GND (PC Card I/O Mode) GND (True IDE Mode) -INPACK (PC Card Memory Mode) -INPACK (PC Card I/O Mode) Input Acknowledge
I/O
31,30,29,28, 27,49,48,47, 6,5,4,3,2, 23, 22, 21
These lines carry the Data, Commands and Status information between the host and the controller. D00 is the LSB of the Even Byte of the Word. D08 is the LSB of the Odd Byte of the Word. This signal is the same as the PC Card Memory Mode signal. In True IDE Mode, all Task File operations occur in Byte-Mode on the low order bus D00-D07 while all data transfers are 16 bit using D00D15.
-
1,50
Ground. This signal is the same for all modes. This signal is the same for all modes.
O
43
This signal is not used in this mode. The Input Acknowledge signal is asserted by the CompactFlash Card when the card is selected and responding to an I/O read cycle at the address that is on the address bus. This signal is used by the host to control the enable of any input data buffers between the CompactFlash card and the CPU. In True IDE Mode this output signal is not used and should not be connected at the host.
-INPACK (True IDE Mode) -IORD (PC Card Memory Mode) -IORD (PC Card I/O Mode) -IORD (True IDE Mode) -IOWR (PC Card Memory Mode) -IOWR (PC Card I/O Mode) -IOWR (True IDE Mode) I 35 I 34
This signal is not used in this mode. This is an I/O Read strobe generated by the host. This signal gates I/O data onto the bus from the CompactFlash Card when the card is configured to use the I/O interface. In True IDE Mode, this signal has the same function as in PC Card I/O Mode. This signal is not used in this mode. The I/O Write strobe pulse is used to clock I/O data on the Card Data bus into the CompactFlash card controller registers when the CompactFlash card is configured to use the I/O interface. The clocking will occur on the negative to positive edge of the signal (trailing edge). In True IDE Mode, this signal has the same function as in PC Card I/O Mode.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet TABLE
Symbol -OE (PC Card Memory Mode) -OE (PC Card I/O Mode) -ATA SEL (True IDE Mode) RDY/-BSY PC Card Memory Mode) O 37
2-2: SIGNAL DESCRIPTION (CONTINUED) (3
Type1 I Pin 9
OF
4)
Name and Functions
This is an Output Enable strobe generated by the host interface. It is used to read data from the CompactFlash card in Memory Mode and to read the CIS and configuration registers. In PC Card I/O Mode, this signal is used to read the CIS and configuration registers. To enable True IDE Mode this input should be grounded by the host. In Memory Mode this signal is set high when the CompactFlash Card is ready to accept a new data transfer operation and held low when the card is busy. The Host memory card socket must provide a pullup resistor. At power up and at Reset, the RDY/-BSY signal is held low (busy) until the CompactFlash card has completed its power up or reset function. No access of any type should be made to the CompactFlash card during this time. The RDY/-BSY signal is held high (disabled from being busy) whenever the following condition is true: The CompactFlash Card has been powered up with +RESET continuously disconnected or asserted. I/O Operation - After the CompactFlash card has been configured for I/O operation, this signal is used as -Interrupt Request. This line is strobed low to generate a pulse mode interrupt or held low for a level mode interrupt. In True IDE Mode signal is the active high Interrupt Request to the host.
-IREQ PC Card I/O Mode)
INTRQ (True IDE Mode) -REG (PC Card Memory Mode) I 44
This signal is used during Memory Cycles to distinguish between Common Memory and Register (Attribute) Memory Attribute Memory Select accesses. High for Common Memory, Low for Attribute Memory. The signal must also be active (low) during I/O Cycles when the I/O address is on the Bus. In True IDE Mode this input signal is not used and should be connected to VDD by the host.
-REG PC Card I/O Mode) -REG (True IDE Mode) RESET (PC Card Memory Mode) I 41
When the pin is high, this signal Resets the CompactFlash Card. The CompactFlash card is Reset only at power up if this pin is left high or open from power-up. The CompactFlash card is also Reset when the Soft Reset bit in the Card Configuration Option Register is set. This signal is the same as the PC Card Memory Mode signal. In the True IDE Mode this input pin is the active low hardware reset from the host.
RESET (PC Card I/O Mode) -RESET (True IDE Mode) VDD (PC Card Memory Mode) VDD (PC Card I/O Mode) VDD (True IDE Mode) 13,38
+5.0V, +3.3V power. This signal is the same for all modes. This signal is the same for all modes.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet TABLE
Symbol -VS1 -VS2 (PC Card Memory Mode) -VS1 -VS2 (PC Card I/O Mode) -VS1 -VS2 (True IDE Mode) -WAIT (PC Card Memory Mode) -WAIT (PC Card I/O Mode) IORDY (True IDE Mode) -WE (PC Card Memory Mode) I 36 O 42
2-2: SIGNAL DESCRIPTION (CONTINUED) (4
Type1 O Pin 33 40
OF
4)
Name and Functions
Voltage Sense Signals. -VS1 is grounded so that the CompactFlash card CIS can be read at 3.3V and -VS2 is reserved by PCMCIA for a secondary voltage. This signal is the same for all modes.
This signal is the same for all modes.
The -WAIT signal is driven low by the CompactFlash Card to signal the host to delay completion of a memory or I/O cycle that is in progress. This signal is the same as the PC Card Memory Mode signal. In True IDE Mode this output signal may be used as IORDY. This is a signal driven by the host and used for strobing memory write data to the registers of the CompactFlash card when the card is configured in the memory interface mode. It is also used for writing the configuration registers. In PC Card I/O Mode, this signal is used for writing the configuration registers. In True IDE Mode this input signal is not used and should be connected to VDD by the host.
-WE (PC Card I/O Mode) -WE (True IDE Mode) WP (PC Card Memory Mode) Write Protect -IOIS16 (PC Card I/O Mode) O 24
Memory Mode - The CompactFlash card does not have a write protect switch. This signal is held low after the completion of the reset initialization sequence. I/O Operation - When the CompactFlash card is configured for I/O Operation Pin 24 is used for the -I/O Selected is 16 Bit Port (-IOIS16) function. A Low signal indicates that a 16 bit or Odd Byte only operation can be performed at the addressed port. In True IDE Mode this output signal is asserted low when this device is expecting a word data transfer cycle.
T2-2.0 375
-IOIS16 (True IDE Mode)
1. I = Input 0 = Output
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet
2.3 Electrical Specification
The following table defines all D.C. Characteristics for the SST CompactFlash card product family. Unless otherwise stated, conditions are: Non operating (storage) temperature range -25C to +85C
VDD = 4.5-5.5V VDD = 3.135-3.465V
Ta = 0C to +70C ABSOLUTE MAXIMUM CONDITIONS
Parameter Input Power Voltage on any pin except VDD with respect to GND Symbol VDD V Conditions -0.3V min. to 6.5V Max -0.5V min. to VDD + 0.5V Max
INPUT POWER
Voltage 3.135-3.465V 4.5-5.5V Maximum Average RMS Active Current 75 mA 100 mA Maximum Average RMS Sleep Current 200 A 300 A Measurement Method 3.3V at 25C1 5.0V at 25C1
1. Current measurement is accomplished by connecting an amp meter (set to the 2 amp scale range) in series with the VDD supply to the CompactFlash card. Current measurements are to be taken while looping on a data transfer command with a sector count of 128. Current consumption values for both Read and Write commands are not to exceed the Maximum Average RMS Current specified in this table
CompactFlash products shall operate correctly in both voltage ranges as shown in the table above. To comply with this specification, current requirements must not exceed the maximum limit. 2.3.1 Input Leakage Current In the table below, x refers to the characteristics described in Section 2.3.2. For example, I1U indicates a pull up resistor with a type 1 input characteristic.
Type IxZ IxU IxD Parameter Input Leakage Current Pull Up Resistor Pull Down Resistor Symbol IL RPU1 RPD1 Conditions Min -1 50k 50k Typ Max 1 500k 500k Units A Ohm Ohm
VIH = VDD / VIL = GND
VDD = 5.0V VDD = 5.0V
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Data Sheet 2.3.2 Input Characteristics
Min Type 1 2 3 4 Parameter Input Voltage CMOS Input Voltage CMOS Input Voltage CMOS Schmitt Trigger Input Voltage CMOS Schmitt Trigger Symbol Typ VDD = 3.3V 2.4 0.6 2.0 0.8 2.0 0.5 1.8 0.9 2.4 0.8 2.4 0.8 Volts 2.7 0.8 Volts 2.4 0.8 Volts Max Min Typ VDD = 5.0V Volts Max Units
VIH VIL VIH VIL
VTH
VTL
VTH
VTL
2.3.3 Output Drive Type All output drive type are CMOS level. 2.3.4 Output Drive Characteristics
Type O1 O2 Parameter Output Voltage Output Voltage Symbol VOH VOL VOH VOL Conditions IOH = -4 mA IOL = 4 mA IOH = -8 mA IOL = 8 mA VDD -0.8V GND +0.4V Min VDD -0.8V GND +0.4V Volts Typ Max Units Volts
2.3.5 Interface/Bus Timing There are two types of bus cycles and timing sequences that occur in the PCMCIA type interface, a direct mapped I/O transfer and a memory access. The two timing sequences are explained in detail in the PCMCIA PC Card Standard. SST's CompactFlash card conforms to the timing in that reference document.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 2.3.6 Attribute Memory Read Timing Specification The Attribute Memory access time is defined as 100 ns. Detailed timing specifications are shown in Table 2-3. TABLE
Item Read Cycle Time Address Access Time Card Enable Access Time Output Enable Access Time Output Disable Time from CE Output Disable Time from OE Address Setup Time Output Enable Time from CE Output Enable Time from OE Data Valid from Address Change
2-3: ATTRIBUTE MEMORY READ TIMING
100 ns Symbol tc(R) ta(A) ta(CE) ta(OE) tdis(CE) tdis(OE) tsu(A) ten(CE) ten(OE) tv(A) IEEE Symbol tAVAV tAVQV tELQV tGLQV tEHQZ tGHQZ tAVGL tELQNZ tGLQNZ tAXQX 10 5 5 0
T2-3.1 375
Speed Version Min1 100
Max1 100 100 50 50 50
1. All times are in nanoseconds. DOUT signifies data provided by the CompactFlash card to the system. The -CE signal or both the -OE signal and the -WE signal must be de-asserted between consecutive cycle operations. All AC specifications are guaranteed by design.
tc(R)
An -REG
tsu(A) ta(A)
tv(A) ta(CE)
-CE
ten(CE)
tdis(CE) ta(OE)
-OE
ten(OE) tdis(OE)
Dout
Dout
375 ILL2-1.0
FIGURE
2-1: ATTRIBUTE MEMORY READ TIMING DIAGRAM
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 2.3.7 Configuration Register (Attribute Memory) Write Timing specification The Card Configuration write access time is defined as 100 ns. Detailed timing specifications are shown in Table 2-4. TABLE
Item Write Cycle Time Write Pulse Width Address Setup Time Write Recovery Time Data Setup Time for WE Data Hold Time
2-4: CONFIGURATION REGISTER (ATTRIBUTE MEMORY) WRITE TIMING
100 ns Symbol tc(W) tw(WE) tsu(A) trec(WE) tsu(D-WEH) th(D) IEEE Symbol tAVAV tWLWH tAVWL tWMAX tDVWH tWMDX Min1 100 60 10 15 40 15
T2-4.1 375
Speed Version
Max1
1. All times are in nanoseconds. DIN signifies data provided by the system to the CompactFlash card. All AC specifications are guaranteed by design.
tc(W)
-Reg An
tsu(A) tw(WE) trec(WE)
-WE
tsu(D-WEH) th(D)
-CE -OE Din
Din Valid
375 ILL2-2.0
FIGURE
2-2: CONFIGURATION REGISTER (ATTRIBUTE MEMORY) WRITE TIMING DIAGRAM
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 2.3.8 Common Memory Read Timing Specification TABLE
Item Output Enable Access Time Output Disable Time from OE Address Setup Time Address Hold Time CE Setup before OE CE Hold following OE
1. All times are in nanoseconds. All AC specifications are guaranteed by design.
2-5: COMMON MEMORY READ TIMING
Symbol ta(OE) tdis(OE) tsu(A) th(A) tsu(CE) th(CE) IEEE Symbol tGLQV tGHQZ tAVGL tGHAX tELGL tGHEH 10 15 0 15
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Min1 ns
Max1 ns 50 50
An
tsu(A) th(A)
-REG -CE -OE
tdis(OE) tsu(CE) ta(OE) th(CE)
Dout
Dout
375 ILL2-3.0
FIGURE
2-3: COMMON MEMORY READ TIMING DIAGRAM
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 2.3.9 Common Memory Write Timing Specification TABLE
Item Data Setup before WE Data Hold following WE WE Pulse Width Address Setup Time CE Setup before WE Write Recovery Time Address Hold Time CE Hold following WE
2-6: COMMON MEMORY WRITE TIMING
Symbol tsu(D-WEH) th(D) tw(WE) tsu(A) tsu(CE) trec(WE) th(A) th(CE) IEEE Symbol tDVWH tWMDX tWLWH tAVWL tELWL tWMAX tGHAX tGHEH Min1 ns 40 15 60 10 0 15 15 15
T2-6.1 375
Max1 ns
1. All times are in nanoseconds. All AC specifications are guaranteed by design.
An
tsu(A) th(A)
-REG
th(CE)
-CE -WE
tsu(CE) tw(WE) trec(WE)
tsu(D-WEH)
th(D) Din Valid
375 ILL2-4.0
Din
FIGURE
2-4: COMMON MEMORY WRITE TIMING DIAGRAM
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 2.3.10 I/O Input (Read) Timing Specification TABLE
Item Data Delay after IORD Data Hold following IORD IORD Width Time Address Setup before IORD Address Hold following IORD CE Setup before IORD CE Hold following IORD REG Setup before IORD REG Hold following IORD INPACK Delay Falling from IORD INPACK Delay Rising from IORD IOIS16 Delay Falling from Address IOIS16 Delay Rising from Address
2-7: I/O READ TIMING
Symbol td(IORD) th(IORD) tw(IORD) tsuA(IORD) thA(IORD) tsuCE(IORD) thCE(IORD) tsuREG(IORD) thREG(IORD) tdfINPACK(IORD) tdrINPACK(IORD) tdfIOIS16(ADR) tdrIOIS16(ADR) IEEE Symbol tlGLQV tlGHQX tlGLIGH tAVIGL tlGHAX tELIGL tlGHEH tRGLIGL tlGHRGH tlGLIAL tlGHIAH tAVISL tAVISH 0 165 70 20 5 20 5 0 0 45 45 35 35
T2-7.1 375
Min1
Max1 100
1. All times are in nanoseconds. Note: The maximum load on -INPACK and -IOIS16 is 1 LSTTL with 50pF total load. All AC specifications are guaranteed by design.
An
tsuA(IORD) thA(IORD) thREG(IORD) thCE(IORD) tw(IORD)
-REG -CE -IORD -INPACK -IOIS16
tdfIOIS16(ADR)
tsuREG(IORD) tsuCE(IORD)
tdrINPACK(IORD) tdfINPACK(IORD) tdrIOIS16(ADR) td(IORD) th(IORD) Dout
375 ILL2-5.0
Dout
FIGURE
2-5: I/O READ TIMING DIAGRAM
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 2.3.11 I/O Output (Write) Timing Specification TABLE
Item Data Setup before IOWR Data Hold following IOWR IOWR Width Time Address Setup before IOWR Address Hold following IOWR CE Setup before IOWR CE Hold following IOWR REG Setup before IOWR REG Hold following IOWR IOIS16 Delay Falling from Address IOIS16 Delay Rising from Address
2-8: I/O WRITE TIMING
Symbol tsu(IOWR) th(IOWR) tw(IOWR) tsuA(IOWR) thA(IOWR) tsuCE(IOWR) thCE(IOWR) tsuREG(IOWR) thREG(IOWR) tdfIOIS16(ADR) tdrIOIS16(ADR) IEEE Symbol tDVIWH tlWHDX tlWLIWH tAVIWL tlWHAX tELIWL tlWHEH tRGLIWL tlWHRGH tAVISL tAVISH Min1 60 30 165 70 20 5 20 5 0 35 35
T2-8.1 375
Max1
1. All times are in nanoseconds. Note: The maximum load on -INPACK, and -IOIS16 is 1 LSTTL with 50pF total load. All AC specifications are guaranteed by design.
An
tsuA(IOWR) thA(IOWR) thREG(IOWR) thCE(IOWR) tw(IOWR)
-REG -CE -IOWR -IOIS16 tdfIOIS16(ADR) Din
tsuREG(IOWR) tsuCE(IOWR)
tdrIOIS16(ADR) tsu(IOWR) th(IOWR) Din Valid
375 ILL2-6.0
FIGURE
2-6: I/O WRITE TIMING DIAGRAM
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 2.3.12 True IDE Mode I/O Input (Read) Timing Specification TABLE
Item Data Delay after IORD Data Hold following IORD IORD Width Time Address Setup before IORD Address Hold following IORD CE Setup before IORD CE Hold following IORD IOIS16 Delay Falling from Address IOIS16 Delay Rising from Address
2-9: TRUE IDE MODE I/O READ TIMING DIAGRAM
Symbol td(IORD) th(IORD) tw(IORD) tsuA(IORD) thA(IORD) tsuCE(IORD) thCE(IORD) tdfIOIS16(ADR) tdrIOIS16(ADR) IEEE Symbol tlGLQV tlGHQX tlGLIGH tAVIGL tlGHAX tELIGL tlGHEH tAVISL tAVISH 5 70 25 10 10 5 20 20
T2-9.2 375
Min1
Max1 50
1. All times are in nanoseconds. Note: The maximum load on -IOIS16 is 1 LSTTL with 50pF total load. All AC specifications are guaranteed by design.
An
tsuA(IORD) thA(IORD) thCE(IORD) tw(IORD)
-CE -IORD -IOIS16
tdfIOIS16(ADR)
tsuCE(IORD)
tdrIOIS16(ADR) td(IORD) th(IORD) Dout
375 ILL2-7.0
Dout
FIGURE
2-7: TRUE IDE MODE I/O READ TIMING DIAGRAM
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 2.3.13 True IDE Mode I/O Output (Write) Timing Specification TABLE 2-10: TRUE IDE MODE I/O WRITE TIMING
Item Data Setup before IOWR Data Hold following IOWR IOWR Width Time Address Setup before IOWR Address Hold following IOWR CE Setup before IOWR CE Hold following IOWR IOIS16 Delay Falling from Address IOIS16 Delay Rising from Address Symbol tsu(IOWR) th(IOWR) tw(IOWR) tsuA(IOWR) thA(IOWR) tsuCE(IOWR) thCE(IOWR) tdfIOIS16(ADR) tdrIOIS16(ADR) IEEE Symbol tDVIWH tlWHDX tlWLIWH tAVIWL tlWHAX tELIWL tlWHEH tAVISL tAVISH Min1 20 10 70 25 10 10 5 20 20
T2-10.2 375
Max1
1. All times are in nanoseconds. Note: The maximum load on -IOIS16 is 1 LSTTL with 50pF total load. All AC specifications are guaranteed by design.
An
tsuA(IOWR) thA(IOWR) thCE(IOWR) tw(IOWR)
-CE -IORD -IOIS16
tdfIOIS16(ADR)
tsuCE(IOWR)
tdrIOIS16(ADR)
tsu(IOWR) Din Valid
th(IOWR)
Din
375 ILL2-8.0
FIGURE
2-8: True IDE Mode I/O Write Timing Diagram
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet
2.4 Card Configuration
The CompactFlash cards are identified by appropriate information in the Card Information Structure (CIS). The following configuration registers are used to coordinate the I/O spaces and the Interrupt level of cards that are located in the system. In addition, these registers provide a method for accessing status information about the CompactFlash card that may be used to arbitrate between multiple interrupt sources on the same interrupt level or to replace status information that appears on dedicated pins in memory cards that have alternate use in I/O cards. TABLE 2-11: REGISTERS AND MEMORY SPACE DECODING
-CE2 1 X 1 0 0 X 1 0 0 X 1 1 1 0 0 -CE1 1 0 0 1 0 0 0 1 0 0 0 0 0 1 1 -REG X 0 1 1 1 0 1 1 1 0 0 0 0 0 0 -OE X 0 0 0 0 1 1 1 1 0 1 0 1 0 1 -WE X 1 1 1 1 0 0 0 0 1 0 1 0 1 0 A10 X 0 X X X 0 X X X 0 0 X X X X A9 X 1 X X X 1 X X X 0 0 X X X X A8-A4 XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX A3 X X X X X X X X X X X X X X X A2 X X X X X X X X X X X X X X X A1 X X X X X X X X X X X X X X X A0 X 0 X X 0 0 X X 0 0 0 1 1 X X Selected Space Standby Configuration Registers Read Common Memory Read (8 bit D7-D0) Common Memory Read (8 bit D15-D8) Common Memory Read (16 bit D15-D0) Configuration Registers Write Common Memory Write (8 bit D7-D0) Common Memory Write (8 bit D15-D8) Common Memory Write (16 bit D15-D0) Card Information Structure Read Invalid Access (CIS Write) Invalid Access (Odd Attribute Read) Invalid Access (Odd Attribute Write) Invalid Access (Odd Attribute Read) Invalid Access (Odd Attribute Write)
T2-11.0 375
TABLE 2-12: CONFIGURATION REGISTERS DECODING
-CE2 X X X X X X X X -CE1 0 0 0 0 0 0 0 0 -REG 0 0 0 0 0 0 0 0 -OE 0 1 0 1 0 1 0 1 -WE 1 0 1 0 1 0 1 0 A10 0 0 0 0 0 0 0 0 A9 1 1 1 1 1 1 1 1 A8-A4 00 00 00 00 00 00 00 00 A3 0 0 0 0 0 0 0 0 A2 0 0 0 0 1 1 1 1 A1 0 0 1 1 0 0 1 1 A0 0 0 0 0 0 0 0 0 Selected Register Configuration Option Reg Read Configuration Option Reg Write Card Status Register Read Card Status Register Write Pin Replacement Register Read Pin Replacement Register Write Socket and Copy Register Read Socket and Copy Register Write
T2-12.0 375
Note: The location of the card configuration registers should always be read from the CIS locations 0000H to 0198H. No writes should be performed to the CompactFlash card attribute memory except to the card configuration register addresses. All other attribute memory locations are reserved.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 2.4.1 Attribute Memory Function Attribute memory is a space where CompactFlash card identification and configuration information are stored, and is limited to 8-bit wide accesses only at even addresses. The card configuration registers are also located here. For the Attribute Memory Read function, signals -REG and -OE must be active and -WE inactive during the cycle. As in the Main Memory Read functions, the signals -CE1 and -CE2 control the Even Byte and Odd Byte address, but only the Even Byte data is valid during the Attribute Memory access. Refer to Table 2-13 below for signal states and bus validity for the Attribute Memory function. TABLE 2-13: ATTRIBUTE MEMORY FUNCTION
Function Mode Standby Mode Read Byte Access CIS ROM (8 bits) Write Byte Access CIS (8 bits) (Invalid) Read Byte Access Configuration (8 bits) Write Byte Access Configuration (8 bits) Read Word Access CIS (16 bits) Write Word Access CIS (16 bits) (Invalid) Read Word Access Configuration (16 bits) Write Word Access Configuration (16 bits) -REG X VIL VIL VIL VIL VIL VIL VIL VIL -CE2 VIH VIH VIH VIH VIH VIL VIL VIL VIL -CE1 VIH VIL VIL VIL VIL VIL VIL VIL VIL A10 X VIL VIL VIL VIL VIL VIL VIL VIL A9 X VIL VIL VIH VIH VIL VIL VIH VIH A0 X VIL VIL VIL VIL X X X X -OE X VIL VIH VIL VIH VIL VIH VIL VIH -WE X VIH VIL VIH VIL VIH VIL VIH VIL D15-D8 High Z High Z Don't Care High Z Don't Care Not Valid Don't Care Not Valid Don't Care D7-D0 High Z Even Byte Even Byte Even Byte Even Byte Even Byte Even Byte Even Byte Even Byte
T2-13.0 375
Note: The -CE signal or both the -OE signal and the -WE signal must be de-asserted between consecutive cycle operations.
2.4.2 Configuration Option Register (Address 200H in Attribute Memory) The Configuration Option Register is used to configure the cards interface, address decoding and interrupt and to issue a soft reset to the CompactFlash card.
Operation R/W D7 SRESET D6 LevlREQ D5 Conf5 D4 Conf4 D3 Conf3 D2 Conf2 D1 Conf1 D0 Conf0
SRESET
Soft Reset - Setting this bit to one (1), waiting the minimum reset width time and returning to zero (0) places the CompactFlash card in the Reset state. Setting this bit to one (1) is equivalent to assertion of the +RESET signal except that the SRESET bit is not cleared. Returning this bit to zero (0) leaves the CompactFlash card in the same unconfigured Reset state as following power-up and hardware reset. This bit is set to zero (0) by power-up and hardware reset. Using the PCMCIA Soft Reset is considered a hard Reset by the ATA Commands. Contrast with Soft Reset in the Device Control Register. This bit is set to one (1) when Level Mode Interrupt is selected, and zero (0) when Pulse Mode is selected. Set to zero (0) by Reset. Conf0 Configuration Index. Set to zero (0) by reset. It's used to select operation mode of the CompactFlash card as shown below. Note: Conf5 and Conf4 are reserved and must be written as (0).
LevlREQ Conf5
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet TABLE 2-14: CARD CONFIGURATIONS
Conf5 0 0 0 0 Conf4 0 0 0 0 Conf3 0 0 0 0 Conf2 0 0 0 0 Conf1 0 0 1 1 Conf0 0 1 0 1 Disk Card Mode Memory Mapped I/O Mapped, any 16 Byte system decoded boundary I/O Mapped, 1F0H-1F7H/3F6H-3F7H I/O Mapped, 170H-177H/376H-377H
T2-14.0 375
2.4.3 Card Configuration and Status Register (Address 202H in Attribute Memory) The Card Configuration and Status Register contains information about the card's condition. CARD CONFIGURATION
Operation Read Write D7 Changed 0
AND
STATUS REGISTER ORGANIZATION
D6 SigChg SigChg D5 IOis8 IOis8 D4 0 0 D3 0 0 D2 PwrDwn PwrDwn D1 Int 0 D0 0 0
Changed
Indicates that one or both of the Pin Replacement register CRdy or CWProt bits are set to one (1). When the Changed bit is set, Pin 46 (-STSCHG) is held low if the SigChg bit is a One (1) and the CompactFlash card is configured for the I/O interface. This bit is set and reset by the host to enable and disable a state-change "signal" from the Status Register, the Changed bit control pin 46 the Changed Status signal. If no state change signal is desired, this bit should be set to zero (0) and pin 46 (-STSCHG) signal will be held high while the CompactFlash card is configured for I/O The host sets this bit to a one (1) if the CompactFlash card is to be configured in an 8-bit I/O Mode. The CompactFlash card is always configured for both 8- and 16-bit I/O, so this bit is ignored. This bit indicates whether the host requests the CompactFlash card to be in the power saving or active mode. When the bit is one (1), the CompactFlash card enters a power down mode. When zero (0), the host is requesting the CompactFlash card to enter the active mode. The PCMCIA Rdy/-Bsy value becomes BUSY when this bit is changed. Rdy/-Bsy will not become Ready until the power state requested has been entered. The CompactFlash card automatically powers down when it is idle and powers back up when it receives a command. This bit represents the internal state of the interrupt request. This value is available whether or not I/O interface has been configured. This signal remains true until the condition which caused the interrupt request has been serviced. If interrupts are disabled by the -IEN bit in the Device Control Register, this bit is a zero (0).
SigChg
IOis8
PwrDwn
Int
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 2.4.4 Pin Replacement Register (Address 204H in Attribute Memory)
Operation Read Write D7 0 0 D6 0 0 D5 CRdy/-Bsy CRdy/-Bsy D4 CWProt CWProt D3 1 0 D2 1 0 D1 Rdy/-Bsy MRdy/-Bsy D0 0 X
CRdy/-Bsy CWProt Rdy/-Bsy
This bit is set to one (1) when the bit RRdy/-Bsy changes state. This bit can also be written by the host. This bit is set to one (1) when the RWprot changes state. This bit may also be written by the host. This bit is used to determine the internal state of the Rdy/-Bsy signal. This bit may be used to determine the state of the Ready/-Busy as this pin has been reallocated for use as Interrupt Request on an I/O card. When written, this bit acts as a mask for writing the corresponding bit CRdy/-Bsy. This bit acts as a mask for writing the corresponding bit CRdy/-Bsy. This bit is ignored by the CompactFlash card.
MRdy/-Bsy X
TABLE 2-15: PIN REPLACEMENT CHANGED BIT/MASK BIT VALUES
Written by Host Initial Value of (C) Status 0 1 X X "C" Bit X X 0 1 "M" Bit 0 0 1 1 Final "C" Bit 0 1 0 1 Comments Unchanged Unchanged Cleared by Host Set by Host
T2-15.0 375
2.4.5 Socket and Copy Register (Address 206H in Attribute Memory) This register contains additional configuration information. This register is always written by the system before writing the card's Configuration Index Register. SOCKET
AND
COPY REGISTER ORGANIZATION:
D7 0 0 D6 0 0 D5 CRdy/-Bsy CRdy/-Bsy D4 CWProt CWProt D3 1 0 D2 1 0 D1 Rdy/-Bsy MRdy/-Bsy D0 0 X
Operation Read Write
Reserved Drive # X
This bit is reserved for future standardization. This bit must be set to zero (0) by the software when the register is written. This bit indicates the drive number of the card for twin card configuration. Twin card configuration is currently not supported. The socket number is ignored by the CompactFlash card.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet
2.5 I/O Transfer Function
2.5.1 I/O Function The I/O transfer to or from the CompactFlash card can be either 8 or 16 bits. When a 16-bit accessible port is addressed, the signal -IOIS16 is asserted by the CompactFlash card. Otherwise, the -IOIS16 signal is de-asserted. When a 16 bit transfer is attempted, and the -IOIS16 signal is not asserted by the CompactFlash card, the system must generate a pair of 8-bit references to access the word's Even Byte and Odd Byte. The CompactFlash card permits both 8 and 16 bit accesses to all of its I/O addresses, so -IOIS16 is asserted for all addresses to which the CompactFlash card responds. TABLE 2-16: I/O FUNCTION
Function Code Standby Mode Byte Input Access (8 bits) Byte Output Access (8 bits) Word Input Access (16 bits) Word Output Access (16 bits) I/O Read Inhibit I/O Write Inhibit High Byte Input Only (8 bits) High Byte Output Only (8 bits) -REG X -CE2 -CE1 A0 X -IORD X -IOWR X D15-D8 High Z High Z High Z Don't Care Don't Care Odd Byte Odd Byte Don't Care High Z Odd Byte Odd Byte D7-D0 High Z Even Byte Odd Byte Even Byte Odd Byte Even Byte Even Byte Don't Care High Z High Z Don't Care
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VIL VIL VIL VIL VIL VIL VIH VIH VIL VIL
VIH VIH VIH VIH VIH VIL VIL
X X
VIH VIL VIL VIL VIL VIL VIL
X X
VIL VIH VIL VIH VIL VIL
X X X X
VIL VIL VIH VIH VIL VIH VIL VIH VIL VIH
VIH VIH VIL VIL VIH VIL VIH VIL VIH VIL
VIL VIL
VIH VIH
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Data Sheet
2.6 Common Memory Transfer Function
2.6.1 Common Memory Function The Common Memory Transfer to or from the CompactFlash card can be either 8 or 16 bits. The CompactFlash card permits both 8 and 16 bit accesses to all of its Common Memory addresses. TABLE 2-17: COMMON MEMORY FUNCTION
Function Code Standby Mode Byte Read Access (8 bits) Byte-Write Access (8 bits) Word Read Access (16 bits) Word-Write Access (16 bits) Odd Byte Read Only (8 bits) Odd Byte-Write Only (8 bits) -REG X VIH VIH VIH VIH -CE2 -CE1 A0 X VIL VIH VIL VIH X X X X -OE X VIL VIL VIH VIH -WE X VIH VIH VIL VIL D15-D8 High Z High Z High Z Don't Care Don't Care Odd Byte Odd Byte Odd Byte Odd Byte D7-D0 High Z Even Byte Odd Byte Even Byte Odd Byte Even Byte Even Byte High Z Don't Care
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VIH
VIH VIH VIH VIH
VIH
VIL VIL VIL VIL
VIH VIH VIH VIH
VIL VIL VIL VIL
VIL VIL VIH VIH
VIL VIH VIL VIH
VIH VIL VIH VIL
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Data Sheet
2.7 True IDE Mode I/O Transfer Function
2.7.1 True IDE Mode I/O Function The CompactFlash card can be configured in a True IDE Mode of operation. The CompactFlash card is configured in this mode only when the -OE input signal is grounded by the host during the power off to power on cycle. In this True IDE Mode the PCMCIA protocol and configuration are disabled and only I/O operations to the Task File and Data Register are allowed. In this mode no Memory or Attribute Registers are accessible to the host. CompactFlash cards permit 8 bit data accesses if the user issues a Set Feature Command to put the device in 8 bit Mode. Note: Removing and reinserting the CompactFlash card while the host computer's power is on will reconfigure the CompactFlash to PC Card ATA mode from the original True IDE Mode. To configure the CompactFlash card in True IDE Mode, the 50-pin socket must be power cycled with the CompactFlash card inserted and -OE (output enable) asserted. Table 2-18 defines the function of the operations for the True IDE Mode. TABLE 2-18: TRUE IDE MODE I/O FUNCTION
Function Code Invalid Mode Standby Mode Task File Write Task File Read Data Register Write Data Register Read Control Register Write Alt Status Read Drive Address -CE2 -CE1 A0-A2 X X 1-7H 1-7H 0 0 6H 6H 7H -IORD X X -IOWR X X D15-D8 High Z High Z Don't Care High Z Odd Byte In Odd Byte Out Don't Care High Z High Z D7-D0 High Z High Z Data In Data Out Even Byte In Even Byte Out Control In Status Out Data Out
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VIL VIH VIH VIH VIH VIH VIL VIL VIL
VIL VIH VIL VIL VIL VIL VIH VIH VIH
VIH VIL VIH VIL VIH VIL VIL
VIL VIH VIL VIH VIL VIH VIH
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Data Sheet
3.0 SOFTWARE INTERFACE 3.1 CF-ATA Drive Register Set Definition and Protocol
The CompactFlash card can be configured as a high performance I/O device through: 1. Standard PC-AT disk I/O address spaces 1F0H-1F7H, 3F6H-3F7H (primary); 170H-177H, 376H-377H (secondary) with IRQ 14 (or other available IRQ). 2. Any system decoded 16 Byte I/O block using any available IRQ. 3. Memory space. The communication to or from the CompactFlash card is done using the Task File registers which provide all the necessary registers for control and status information. The PCMCIA interface connects peripherals to the host using four register mapping methods. The following is a detailed description of these methods: TABLE 3-1: I/O CONFIGURATIONS
Standard Configurations Config Index 0 1 2 3 I/O or Memory Memory I/O I/O I/O Address 0H-FH, 400H-7FFH XX0H-XXFH 1F0H-1F7H, 3F6H-3F7H 170H-177H, 376H-377H Description Memory Mapped I/O Mapped 16 Contiguous Registers Primary I/O Mapped Secondary I/O Mapped
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3.1.1 I/O Primary and Secondary Address Configurations TABLE
-REG 0 0 0 0 0 0 0 0 0 0
3-2: PRIMARY
A9-A4 1F(17)H 1F(17)H 1F(17)H 1F(17)H 1F(17)H 1F(17)H 1F(17)H 1F(17)H 3F(37)H 3F(37)H
AND
SECONDARY I/O DECODING
A2 0 0 0 0 1 1 1 1 1 1 A1 0 0 1 1 0 0 1 1 1 1 A0 0 1 0 1 0 1 0 1 0 1 -IORD=0 Even RD Data Error Register Sector Count Sector No. Cylinder Low Cylinder High Select Card/Head Status Alt Status Drive Address -IOWR=0 Even WR Data Features Sector Count Sector No. Cylinder Low Cylinder High Select Card/Head Command Device Control Reserved
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A3 0 0 0 0 0 0 0 0 0 0
Note
1,2 1,2
1. Register 0 is accessed with -CE1 low and -CE2 low (and A0 = Don't Care) as a word register on the combined Odd Data Bus and Even Data Bus (D15-D0). This register may also be accessed by a pair of byte accesses to the offset 0 with -CE1 low and -CE2 high. Note that the address space of this word register overlaps the address space of the Error and Feature byte-wide registers which lie at offset 1. When accessed twice as byte register with -CE1 low, the first byte to be accessed is the Even Byte of the word and the second byte accessed is the Odd Byte of the equivalent word access. 2. A byte access to register 0 with -CE1 high and -CE2 low accesses the error (read) or feature (write) register. Note: Address lines which are not indicated are ignored by the CompactFlash card for accessing all the registers in this table.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 3.1.2 Contiguous I/O Mapped Addressing When the system decodes a contiguous block of I/O registers to select the CompactFlash card, the registers are accessed in the block of I/O space decoded by the system as follows: TABLE
-REG 0 0 0 0 0 0 0 0 0 0 0 0 0
3-3: CONTIGUOUS I/O DECODING
A3 0 0 0 0 0 0 0 0 1 1 1 1 1 A2 0 0 0 0 1 1 1 1 0 0 1 1 1 A1 0 0 1 1 0 0 1 1 0 0 0 1 1 A0 0 1 0 1 0 1 0 1 0 1 1 0 1 Offset 0 1 2 3 4 5 6 7 8 9 D E F -IORD=0 Even RD Data Error Sector Count Sector No. Cylinder Low Cylinder High Select Card/Head Status Dup. Even RD Data Dup. Odd RD Data Dup. Error Alt Status Drive Address -IOWR=0 Even WR Data Features Sector Count Sector No. Cylinder Low Cylinder High Select Card/Head Command Dup. Even WR Data Dup. Odd WR Data Dup. Features Device Ctl Reserved
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Notes
1 2
2 2 2
1. Register 0 is accessed with -CE1 low and -CE2 low (and A0 = Don't Care) as a word register on the combined Odd Data Bus and Even Data Bus (D15-D0). This register may also be accessed by a pair of byte accesses to the offset 0 with -CE1 low and -CE2 high. Note that the address space of this word register overlaps the address space of the Error and Feature byte-wide registers that lie at offset 1. When accessed twice as byte register with -CE1 low, the first byte to be accessed is the Even Byte of the word and the second byte accessed is the Odd Byte of the equivalent word access. A byte access to register 0 with -CE1 high and -CE2 low accesses the error (read) or feature (write) register. 2. Registers at offset 8, 9, and D are non-overlapping duplicates of the registers at offset 0 and 1. Register 8 is equivalent to register 0, while register 9 accesses the Odd Byte. Therefore, if the registers are byte accessed in the order 9 then 8 the data will be transferred Odd Byte then Even Byte. Repeated byte accesses to register 8 or 0 will access consecutive (Even then Odd) Bytes from the data buffer. Repeated word accesses to register 8, 9, or 0 will access consecutive words from the data buffer. Repeated byte accesses to register 9 are not supported. However, repeated alternating byte accesses to registers 8 then 9 will access consecutive (Even then Odd) Bytes from the data buffer. Byte accesses to register 9 access only the Odd Byte of the data. Note: Address lines which are not indicated are ignored by the CompactFlash card for accessing all the registers in this table.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 3.1.3 Memory Mapped Addressing When the CompactFlash card registers are accessed via memory references, the registers appear in the common memory space window: 0-2 KByte as follows: TABLE
-REG 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
3-4: MEMORY MAPPED DECODING
A10 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 A9-A4 X X X X X X X X X X X X X X X A3 0 0 0 0 0 0 0 0 1 1 1 1 1 X X A2 0 0 0 0 1 1 1 1 0 0 1 1 1 X X A1 0 0 1 1 0 0 1 1 0 0 0 1 1 X X A0 0 1 0 1 0 1 0 1 0 1 1 0 1 0 1 Offset 0 1 2 3 4 5 6 7 8 9 D E F 8 9 -OE=0 Even RD Data Error Sector Count Sector No. Cylinder Low Cylinder High Select Card/Head Status Dup. Even RD Data Dup. Odd RD Data Dup. Error Alt Status Drive Address Even RD Data Odd RD Data -WE=0 Even WR Data Features Sector Count Sector No. Cylinder Low Cylinder High Select Card/Head Command Dup. Even WR Data Dup. Odd WR Data Dup. Features Device Ctl Reserved Even WR Data Odd WR Data
3 3
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Notes
1,2 1,2
2 2 2
1. Register 0 is accessed with -CE1 low and -CE2 low as a word register on the combined Odd Data Bus and Even Data Bus (D15-D0). This register may also be accessed by a pair of byte accesses to the offset 0 with -CE1 low and -CE2 high. Note that the address space of this word register overlaps the address space of the Error and Feature byte-wide registers that lie at offset 1. When accessed twice as byte register with -CE1 low, the first byte to be accessed is the Even Byte of the word and the second byte accessed is the Odd Byte of the equivalent word access. A byte access to address 0 with -CE1 high and -CE2 low accesses the error (read) or feature (write) register. 2. Registers at offset 8, 9 and D are non-overlapping duplicates of the registers at offset 0 and 1. Register 8 is equivalent to register 0, while register 9 accesses the Odd Byte. Therefore, if the registers are byte accessed in the order 9 then 8 the data will be transferred Odd Byte then Even Byte. Repeated byte accesses to register 8 or 0 will access consecutive (Even then Odd) Bytes from the data buffer. Repeated word accesses to register 8, 9 or 0 will access consecutive words from the data buffer. Repeated byte accesses to register 9 are not supported. However, repeated alternating byte accesses to registers 8 then 9 will access consecutive (Even then Odd) Bytes from the data buffer. Byte accesses to register 9 access only the Odd Byte of the data. 3. Accesses to even addresses between 400H and 7FFH access register 8. Accesses to odd addresses between 400H and 7FFH access register 9. This 1 KByte memory window to the data register is provided so that hosts can perform memory to memory block moves to the data register when the register lies in memory space. Some hosts, such as the X86 processors, must increment both the source and destination addresses when executing the memory to memory block move instruction. Some PCMCIA socket adapters also have auto incrementing address logic embedded within them. This address window allows these hosts and adapters to function efficiently. Note that this entire window accesses the Data Register FIFO and does not allow random access to the data buffer within the CompactFlash card. A word access to address at offset 8 will provide even data on the low-order byte of the data bus, along with odd data at offset 9 on the high-order byte of the data bus.
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Data Sheet 3.1.4 True IDE Mode Addressing When the CompactFlash Card is configured in the True IDE Mode, the I/O decoding is as follows: TABLE
-CE2 1 1 1 1 1 1 1 1 0 0
3-5: TRUE IDE MODE I/O DECODING
-CE1 0 0 0 0 0 0 0 0 1 1 A2 0 0 0 0 1 1 1 1 1 1 A1 0 0 1 1 0 0 1 1 1 1 A0 0 1 0 1 0 1 0 1 0 1 -IORD=0 RD Data Error Register Sector Count Sector No. Cylinder Low Cylinder High Select Card/Head Status Alt Status Drive Address -IOWR=0 WR Data Features Sector Count Sector No. Cylinder Low Cylinder High Select Card/Head Command Device Control Reserved
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3.1.5 CF-ATA Registers The following section describes the hardware registers used by the host software to issue commands to the CompactFlash device. These registers are often collectively referred to as the "task file." Note: In accordance with the PCMCIA specification: each of the registers below which is located at an odd offset address may be accessed at its normal address and also the corresponding even address (normal address -1) using data bus lines (D15-D8) when -CE1 is high and -CE2 is low unless -IOIS16 is high (not asserted) and an I/O cycle is being performed. 3.1.5.1 Data Register (Address - 1F0H[170H];Offset 0,8,9) The Data Register is a 16 bit register, and it is used to transfer data blocks between the CompactFlash card data buffer and the Host. This register overlaps the Error Register. The table below describes the combinations of data register access and is provided to assist in understanding the overlapped Data Register and Error/Feature Register rather than to attempt to define general PCMCIA word and byte access modes and operations. See the PCMCIA PC Card Standard Release 2.0 for definitions of the Card Accessing Modes for I/O and Memory cycles. Note: Because of the overlapped registers, access to the 1F1H, 171H or offset 1 are not defined for word (-CE2=0 and -CE1=0) operations. These accesses are treated as accesses to the Word Data Register. The duplicated registers at offsets 8, 9 and DH have no restrictions on the operations that can be performed by the socket.
Data Register Word Data Register Even Data Register Odd Data Register Odd Data Register Error / Feature Register Error / Feature Register Error / Feature Register CE20 1 1 0 1 0 0 CE10 0 0 1 0 1 0 A0 X 0 1 X 1 X X Offset 0,8,9 0,8 9 8,9 1, DH 1 DH Data Bus D15-D0 D7-D0 D7-D0 D15-D8 D7-D0 D15-D8 D15-D8
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 3.1.5.2 Error Register (Address - 1F1H[171H]; Offset 1, 0DH Read Only) This register contains additional information about the source of an error when an error is indicated in bit 0 of the Status register. The bits are defined as follows:
D7 BBK D6 UNC D5 0 D4 IDNF D3 0 D2 ABRT D1 0 D0 AMNF
This register is also accessed on data bits D15-D8 during a write operation to offset 0 with -CE2 low and -CE1 high. Bit 7 (BBK) Bit 6 (UNC) Bit 5 Bit 4 (IDNF) Bit 3 Bit 2 (Abort) Bit 1 This bit is set when a Bad Block is detected. This bit is set when an Uncorrectable Error is encountered. This bit is 0. The requested sector ID is in error or cannot be found. This bit is 0. This bit is set if the command has been aborted because of a CompactFlash card status condition: (Not Ready, Write Fault, etc.) or when an invalid command has been issued. This bit is 0.
Bit 0 (AMNF) This bit is set in case of a general error. 3.1.5.3 Feature Register (Address - 1F1H[171H]; Offset 1, 0DH Write Only) This register provides information regarding features of the CompactFlash card that the host can utilize. This register is also accessed on data bits D15-D8 during a write operation to Offset 0 with -CE2 low and -CE1 high. 3.1.5.4 Sector Count Register (Address - 1F2H[172H]; Offset 2) This register contains the numbers of sectors of data requested to be transferred on a read or write operation between the host and the CompactFlash card. If the value in this register is zero, a count of 256 sectors is specified. If the command was successful, this register is zero at command completion. If not successfully completed, the register contains the number of sectors that need to be transferred in order to complete the request. 3.1.5.5 Sector Number (LBA 7-0) Register (Address - 1F3H[173H]; Offset 3) This register contains the starting sector number or bits 7-0 of the Logical Block Address (LBA) for any CompactFlash card data access for the subsequent command. 3.1.5.6 Cylinder Low (LBA 15-8) Register (Address - 1F4H[174H]; Offset 4) This register contains the low order 8 bits of the starting cylinder address or bits 15-8 of then Logical Block Address. 3.1.5.7 Cylinder High (LBA 23-16) Register (Address - 1F5H[175H]; Offset 5) This register contains the high order bits of the starting cylinder address or bits 23-16 of the Logical Block Address. This register is also accessed on data bits D15-D8 during a write operation to offset 0 with -CE2 low and -CE1 high.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 3.1.5.8 Drive/Head (LBA 27-24) Register (Address 1F6H[176H]; Offset 6) The Drive/Head register is used to select the drive and head. It is also used to select LBA addressing instead of cylinder/head/sector addressing. The bits are defined as follows:
D7 1 D6 LBA D5 1 D4 DRV D3 HS3 D2 HS2 D1 HS1 D0 HS0
Bit 7 Bit 6
This bit is set to 1. LBA is a flag to select either Cylinder/Head/Sector (CHS) or Logical Block Address Mode (LBA). When LBA=0, Cylinder/Head/Sector mode is selected. When LBA=1, Logical Block Address is selected. In Logical Block Mode, the Logical Block Address is interpreted as follows: LBA7-LBA0: Sector Number Register D7-D0. LBA15-LBA8: Cylinder Low Register D7-D0. LBA23-LBA16: Cylinder High Register D7-D0. LBA27-LBA24: Drive/Head Register bits HS3-HS0.
Bit 5 Bit 4 (DRV)
This bit is set to 1. DRV is the drive number. When DRV=0, drive (card) 0 is selected. When DRV=1, drive (card) 1 is selected. The CompactFlash card is set to be Card 0 or 1 using the copy field (Drive #) of the PCMCIA Socket & Copy configuration register. When operating in the Cylinder, Head, Sector mode, this is bit 3 of the head number. It is Bit 27 in the Logical Block Address mode. When operating in the Cylinder, Head, Sector mode, this is bit 2 of the head number. It is Bit 26 in the Logical Block Address mode. When operating in the Cylinder, Head, Sector mode, this is bit 1 of the head number. It is Bit 25 in the Logical Block Address mode. When operating in the Cylinder, Head, Sector mode, this is bit 0 of the head number. It is Bit 24 in the Logical Block Address mode.
Bit 3 (HS3) Bit 2 (HS2) Bit 1 (HS1) Bit 0 (HS0)
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 3.1.5.9 Status & Alternate Status Registers (Address 1F7H[177H]&3F6H[376H]; Offsets 7 & E) These registers return the CompactFlash card status when read by the host. Reading the Status register does clear a pending interrupt while reading the Auxiliary Status register does not. The meaning of the status bits are described as follows:
D7 BUSY D6 RDY D5 DWF D4 DSC D3 DRQ D2 CORR D1 0 D0 ERR
Bit 7 (BUSY) The busy bit is set when the CompactFlash card has access to the command buffer and registers and the host is locked out from accessing the command register and buffer. No other bits in this register are valid when this bit is set to a 1. Bit 6 (RDY) RDY indicates whether the device is capable of performing CompactFlash card operations. This bit is cleared at power up and remains cleared until the CompactFlash card is ready to accept a command. This bit, if set, indicates a write fault has occurred. This bit is set when the CompactFlash card is ready. The Data Request is set when the CompactFlash card requires that information be transferred either to or from the host through the Data register.
Bit 5 (DWF) Bit 4 (DSC) Bit 3 (DRQ)
Bit 2 (CORR) This bit is set when a Correctable data error has been encountered and the data has been corrected. This condition does not terminate a multi-sector read operation. Bit 1 (IDX) Bit 0 (ERR) This bit is always set to 0. This bit is set when the previous command has ended in some type of error. The bits in the Error register contain additional information describing the error. It is recommended that media access commands such as Read Sectors and Write Sectors) that end with an error condition should have the address of the first sector in error in the command block registers.
3.1.5.10 Device Control Register (Address - 3F6H[376H]; Offset E) This register is used to control the CompactFlash card interrupt request and to issue an ATA soft reset to the card. This register can be written even if the device is BUSY. The bits are defined as follows:
D7 X D6 X D5 X D4 X D3 1 D2 SW Rst D1 -IEn D0 0
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3
This bit is an X (don't care). This bit is an X (don't care). This bit is an X (don't care). This bit is an X (don't care). This bit is ignored by the CompactFlash card.
Bit 2 (SW Rst) This bit is set to 1 in order to force the CompactFlash card to perform an AT Disk controller Soft Reset operation. This does not change the PCMCIA Card Configuration Registers (4.3.2 to 4.3.5) as a hardware Reset does. The Card remains in Reset until this bit is reset to `0.' Bit1(-IEn) The Interrupt Enable bit enables interrupts when the bit is 0. When the bit is 1, interrupts from the CompactFlash card are disabled. This bit also controls the Int bit in the Configuration and Status Register. This bit is set to 0 at power on and Reset. This bit is ignored by the CompactFlash card.
Bit0
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 3.1.5.11 Card (Drive) Address Register (Address3F7H[377H]; Offset F) This register is provided for compatibility with the AT disk drive interface. It is recommended that this register not be mapped into the host's I/O space because of potential conflicts on Bit 7. The bits are defined as follows:
D7 X D6 -WTG D5 -HS3 D4 -HS2 D3 -HS1 D2 -HS0 D1 -nDS1 D0 -nDS0
Bit 7
This bit is don't care. Implementation Note: Conflicts may occur on the host data bus when this bit is provided by a Floppy Disk Controller operating at the same addresses as the CompactFlash card. Following are some possible solutions to this problem for the PCMCIA implementation: 1. Locate the CompactFlash card at a non-conflicting address, i.e. Secondary address (377) or in an independently decoded Address Space when a Floppy Disk Controller is located at the Primary addresses. 2. Do not install a Floppy and a CompactFlash card in the system at the same time. 3. Implement a socket adapter which can be programmed to (conditionally) tri-state D7 of I/0 address 3F7H/377H when a CompactFlash card is installed and conversely to tristate D6- D0 of I/O address 3F7H/377H when a floppy controller is installed. 4. Do not use the CompactFlash Card's Drive Address register. This may be accomplished by either a) If possible, program the host adapter to enable only I/O addresses 1F0H-1F7H, 3F6H (or 170H-177H, 176H) to the CompactFlash card or b) if provided use an additional Primary/Secondary configuration in the CompactFlash card which does not respond to accesses to I/O locations 3F7H and 377H. With either of these implementations, the host software must not attempt to use information in the Drive Address Register.
Bit 6 (-WTG) This bit is 0 when a write operation is in progress, otherwise, it is 1. Bit 5 (-HS3) Bit 4 (-HS2) Bit 3 (-HS1) Bit 2 (-HS0) This bit is the negation of bit 3 in the Drive/Head register. This bit is the negation of bit 2 in the Drive/Head register. This bit is the negation of bit 1 in the Drive/Head register. This bit is the negation of bit 0 in the Drive/Head register.
Bit 1 (-nDS1) This bit is 0 when drive 1 is active and selected. Bit 0 (-nDS0) This bit is 0 when the drive 0 is active and selected.
3.2 CF-ATA Command Description
This section defines the software requirements and the format of the commands the host sends to the CompactFlash cards. Commands are issued to the CompactFlash card by loading the required registers in the command block with the supplied parameters, and then writing the command code to the Command Register. The manner in which a command is accepted varies. There are three classes (see Table 3-6) of command acceptance, all dependent on the host not issuing commands unless the CompactFlash card is not busy (BSY=0). 3.2.1 CF-ATA Command Set Table 3-6 summarizes the CF-ATA command set with the paragraphs that follow describing the individual commands and the task file for each.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet TABLE
Class 1 1 1 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 3 3 2 2 3
1. 2. 3. 4. 5. 6. 7. 8.
3-6: CF-ATA COMMAND SET
Command Check Power Mode Execute Drive Diagnostic Erase Sector(s) Format Track Identify Drive Idle Idle Immediate Initialize Drive Parameters Read Buffer Read Long Sector Read Multiple Read Sector(s) Read Verify Sector(s) Recalibrate Request Sense Seek Set Features Set Multiple Mode Set Sleep Mode Stand By Stand By Immediate Translate Sector Wear Level Write Buffer Write Long Sector Write Multiple Write Multiple w/o Erase Write Sector(s) Write Sector(s) w/o Erase Write Verify Code E5H or 98H 90H C0H 50H ECH E3H or 97H E1H or 95H 91H E4H 22H or 23H C4H 20H or 21H 40H or 41H 1XH 03H 7XH EFH C6H E6H or 99H E2H or 96H E0H or 94H 87H F5H E8H 32H or 33H C5H CDH 30H or 31H 38H 3CH FR1 Y SC2 Y7 Y Y Y Y Y Y Y Y Y Y Y Y Y SN3 Y Y Y Y Y Y Y Y Y Y Y Y Y CY4 Y Y Y Y Y Y Y Y Y Y Y Y Y Y DH5 D D Y8 Y D D D Y D Y Y Y Y D D Y D D D D D Y Y D Y Y Y Y Y Y LBA6 Y Y Y Y Y Y Y Y Y Y Y Y Y Y
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FR = Features Register SC = Sector Count Register SN = Sector Number Register CY = Cylinder Registers DH = Card/Drive/Head Register LBA = Logical Block Address Mode Supported (see command descriptions for use). Y = The register contains a valid parameter for this command. For the Drive/Head Register: Y means both the CompactFlash card and head parameters are used; D - only the CompactFlash card parameter is valid and not the head parameter.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 3.2.1.1 Check Power Mode - 98H or E5H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) X 7 6 5 4 Drive X X X X X 3 2 X 1 0
97H or E5H
This command checks the power mode. Because SST CompactFlash card can recover from sleep in 200ms, idle mode is never enabled. CompactFlash card sets BSY, sets the Sector Count Register to 00H, clears BSY and generates an interrupt. 3.2.1.2 Execute Drive Diagnostic - 90H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) X Drive X X X X X 7 6 5 4 90H X 3 2 1 0
This command performs the internal diagnostic tests implemented by the CompactFlash card. If in PCMCIA configuration this command runs only on the CompactFlash card which is addressed by the Drive/Head register when the diagnostic command is issued. This is because PCMCIA card interface does not allows for direct inter-drive communication (such as the ATA PDIAG and DASP signals). If in True IDE Mode the Drive bit is ignored and the diagnostic command is executed by both the Master and the Slave with the Master responding with status for both devices. The Diagnostic codes shown in Table 3-7 are returned in the Error Register at the end of the command. TABLE
Code 01H 02H 03H 04H 05H 8XH
3-7: DIAGNOSTIC CODES
Error Type No Error Detected Formatter Device Error Sector Buffer Error ECC Circuitry Error Controlling Microprocessor Error Slave Error in True IDE Mode
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 3.2.1.3 Erase Sector(s) - C0H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) 1 LBA 1 Drive 7 6 5 4 C0H Head (LBA 27-24) 3 2 1 0
Cylinder High (LBA 23-16) Cylinder Low (LBA 15-8) Sector Number (LBA 7-0)
Sector Count X
This command is used to pre-erase and condition data sectors in advance of a Write without Erase or Write Multiple without Erase command. There is no data transfer associated with this command but a Write Fault error status can occur. 3.2.1.4 Format Track - 50H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) 1 LBA 1 Drive 7 6 5 4 50H Head (LBA 27-24) 3 2 1 0
Cylinder High (LBA 23-16) Cylinder Low (LBA 15-8) X (LBA 7-0) Count (LBA mode only)
X
This command writes the desired head and cylinder of the selected drive with a vendor unique data pattern (typically FFH or 00H). To remain host backward compatible, the CompactFlash card expects a sector buffer of data from the host to follow the command with the same protocol as the Write Sector(s) command although the information in the buffer is not used by the CompactFlash card. If LBA=1 then the number of sectors to format is taken from the Sec Cnt register (0=256). The use of this command is not recommended. 3.2.1.5 Identify Drive - ECH
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) X X X Drive X X X X X 7 6 5 4 ECH X 3 2 1 0
The Identify Drive command enables the host to receive parameter information from the CompactFlash card. This command has the same protocol as the Read Sector(s) command. The parameter words in the buffer have the arrangement and meanings defined in Table 3-8. All reserved bits or words are zero. Table 3-8 is the definition for each field in the Identify Drive Information.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet TABLE 3-8: IDENTIFY DRIVE INFORMATION
Default Value 848AH XXXXH 0000H 00XXH XXXXH XXXXH XXXXH XXXXH 0000H aaaa 0002H XXXXH 0004H aaaa aaaa 000XH 0000H 0200H 0000H 0X00H 0000H 000XH XXXXH XXXXH XXXXH XXXXH 010XH XXXXH 0000H 00XXH 0000H XXXXH XXXXH 0000H 0000H 0000H Total Bytes 2 2 2 2 2 2 2 4 2 20 2 2 2 8 40 2 2 2 2 2 2 2 2 2 2 4 2 4 4 2 4 2 2 138 64 192 Data Field Type Information General configuration bit-significant information Default number of cylinders Reserved Default number of heads Number of unformatted bytes per track Number of unformatted bytes per sector Default number of sectors per track Number of sectors per card (Word 7 = MSW, Word 8 = LSW) Vendor Unique Serial number in ASCII. Big Endian Byte Order in Word Buffer type Buffer size in 512 Byte increments # of ECC bytes passed on Read/Write Long Commands Firmware revision in ASCII. Big Endian Byte Order in Word Model number in ASCII. Big Endian Byte Order in Word Maximum number of sectors on Read/Write Multiple command Reserved Capabilities Reserved PIO data transfer cycle timing mode Reserved Translation parameters are valid Current numbers of cylinders Current numbers of heads Current sectors per track Current capacity in sectors (LBAs) (Word 57 = LSW, Word 58 = MSW) Multiple sector setting Total number of sectors addressable in LBA Mode Reserved (DMA data transfer is not supported in CompactFlash) Advanced PIO Transfer Mode Supported Reserved Minimum PIO transfer cycle time without flow control Minimum PIO transfer cycle time with IORDY flow control Reserved Vendor unique bytes Reserved
T3-8.2 375
Word Address 0 1 2 3 4 5 6 7-8 9 10-19 20 21 22 23-26 27-46 47 48 49 50 51 52 53 54 55 56 57-58 59 60-61 62-63 64 65-66 67 68 69-127 128-159 160-255
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 3.2.1.5.1 General Configuration This field informs the host that this is a non-magnetic, hard sectored, removable storage device with a transfer rate greater than 10 MByte/sec and is not MFM encoded. 3.2.1.5.2 Default Number of Cylinders This field contains the number of translated cylinders in the default translation mode. This value will be the same as the number of cylinders. 3.2.1.5.3 Default Number of Heads This field contains the number of translated heads in the default translation mode. 3.2.1.5.4 Number of Unformatted Bytes per Track This field contains the number of unformatted bytes per translated track in the default translation mode. 3.2.1.5.5 Number of Unformatted Bytes per Sector This field contains the number of unformatted bytes per sector in the default translation mode. 3.2.1.5.6 Default Number of Sectors per Track This field contains the number of sectors per track in the default translation mode. 3.2.1.5.7 Number of Sectors per Card This field contains the number of sectors per CompactFlash card. This double word value is also the first invalid address in LBA translation mode. 3.2.1.5.8 Memory Card Serial Number The contents of this field are right justified and padded with spaces (20H). 3.2.1.5.9 Buffer Type This field defines the buffer capability: 0002H: a dual ported multi-sector buffer capable of simultaneous data transfers to or from the host and the CompactFlash card. 3.2.1.5.10 Buffer Size This field defines the buffer capacity in 512 Byte increments. SST's CompactFlash card has up to 8 sector data buffer for host interface. 3.2.1.5.11 ECC Count This field defines the number of ECC bytes used on each sector in the Read and Write Long commands. 3.2.1.5.12 Firmware Revision This field contains the revision of the firmware for this product. 3.2.1.5.13 Model Number This field contains the model number for this product and is left justified and padded with spaces (20H). 3.2.1.5.14 Read/Write Multiple Sector Count This field contains the maximum number of sectors that can be read or written per interrupt using the Read Multiple or Write Multiple commands. SST's CompactFlash card can support up to 2 sectors for Read Multiple or Write Multiple Commands.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 3.2.1.5.15 Capabilities Bit 13: Standby Timer Bit 11: IORDY Support Bit 9: LBA support Bit 8: DMA Support Set to 0, forces sleep mode when host is inactive. Set to 0, indicates that this device may support IORDY operation. Set to 1, SST's CompactFlash supports LBA mode addressing. This bit is set to 0. DMA mode is not supported.
3.2.1.5.16 PIO Data Transfer Cycle Timing Mode This field defines the mode for PIO data transfer. 3.2.1.5.17 Translation Parameters Valid If bit 0 is 1, it indicates that words 54 to 58 are valid and reflect the current number of cylinders, heads and sectors. If bit 1 is 1, it indicates that words 64 to 70 are valid to support PIO Mode-4. 3.2.1.5.18 Current Number of Cylinders, Heads, Sectors/Track These fields contains the current number of user addressable Cylinders, Heads, and Sectors/Track in the current translation mode. 3.2.1.5.19 Current Capacity This field contains the product of the current cylinders times heads times sectors. 3.2.1.5.20 Multiple Sector Setting This field contains a validity flag in the Odd Byte and the current number of sectors that can be transferred per interrupt for R/W Multiple in the Even Byte. The Odd Byte is always 01H which indicates that the Even Byte is always valid. The Even Byte value depends on the value set by the Set Multiple command. The Even Byte of this word by default contains a 00H which indicates that R/W Multiple commands are not valid. 3.2.1.5.21 Advanced PIO Data Transfer Mode CompactFlash supports up to PIO Mode-4. 3.2.1.5.22 Minimum PIO Transfer Cycle Time Without Flow Control The CompactFlash minimum cycle time is 120 ns. 3.2.1.5.23 Minimum PIO Transfer Cycle Time With IORDY The CompactFlash minimum cycle time is 120 ns, e.g., PIO Mode-4. 3.2.1.5.24 Total Sectors Addressable in LBA Mode This field contains the number of sectors addressable for the CompactFlash card in LBA mode only.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 3.2.1.6 Idle - 97H or E3H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) X 7 6 5 4 Drive X X X Timer Count (5 msec increments) X 3 2 X 1 0
97H or E3H
This command causes the CompactFlash card to set BSY, enter the Idle mode, clear BSY and generate an interrupt. If the sector count is non-zero, it is interpreted as a timer count with each count being 5 milliseconds and the automatic power down mode is enabled. If the sector count is zero, the automatic power down mode is also enabled, the timer count is set to 3, with each count being 5 ms. Note that this time base (5 msec) is different from the ATA specification. 3.2.1.7 Idle Immediate - 95H or E1H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) X 7 6 5 4 Drive X X X Timer Count (5 msec increments) X 3 2 X 1 0
95H or E1H
This command causes the CompactFlash card to set BSY, enter the Idle mode, clear BSY and generate an interrupt. 3.2.1.8 Initialize Drive Parameters - 91H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) X 0 X Drive X X X 7 6 5 4 91H Max Head (no. of heads-1) 3 2 1 0
Number of Sectors
X
This command enables the host to set the number of sectors per track and the number of heads per cylinder. Only the Sector Count and the Card/Drive/Head registers are used by this command.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 3.2.1.9 Read Buffer - E4H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) X Drive X X X X X 7 6 5 4 E4H X 3 2 1 0
The Read Buffer command enables the host to read the current contents of the CompactFlash Card's sector buffer. This command has the same protocol as the Read Sector(s) command. 3.2.1.10 Read Multiple - C4H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) 1 LBA 1 Drive Cylinder High (LBA 23-16) Cylinder Low (LBA 15-8) Sector Number (LBA 7-0) Sector Count X 7 6 5 4 C4H Head (LBA 27-24) 3 2 1 0
Note: The current revision of the SST CompactFlash card can support up to a block count of 1 as indicated in the Identify Drive Command information.
The Read Multiple command performs similarly to the Read Sectors command. Interrupts are not generated on every sector, but on the transfer of a block which contains the number of sectors defined by a Set Multiple command. Command execution is identical to the Read Sectors operation except that the number of sectors defined by a Set Multiple command are transferred without intervening interrupts. DRQ qualification of the transfer is required only at the start of the data block, not on each sector. The block count of sectors to be transferred without intervening interrupts is programmed by the Set Multiple Mode command, which must be executed prior to the Read Multiple command. When the Read Multiple command is issued, the Sector Count Register contains the number of sectors (not the number of blocks or the block count) requested. If the number of requested sectors is not evenly divisible by the block count, as many full blocks as possible are transferred, followed by a final, partial block transfer. The partial block transfer is for n sectors, where n = remainder(sector count/block count) If the Read Multiple command is attempted before the Set Multiple Mode command has been executed or when Read Multiple commands are disabled, the Read Multiple operation is rejected with an Aborted Command error. Disk errors encountered during Read Multiple commands are posted at the beginning of the block or partial block transfer, but DRQ is still set and the data transfer will take place as it normally would, including transfer of corrupted data, if any. Interrupts are generated when DRQ is set at the beginning of each block or partial block. The error reporting is the same as that on a Read Sector(s) Command. This command reads from 1 to 256 sectors as specified in the Sector Count register. A sector count of 0 requests 256 sectors. The transfer begins at the sector specified in the Sector Number Register.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet At command completion, the Command Block Registers contain the cylinder, head and sector number of the last sector read. If an error occurs, the read terminates at the sector where the error occurred. The Command Block Registers contain the cylinder, head and sector number of the sector where the error occurred. The flawed data is pending in the sector buffer. Subsequent blocks or partial blocks are transferred only if the error was a correctable data error. All other errors cause the command to stop after transfer of the block which contained the error. 3.2.1.11 Read Long Sector - 22H or 23H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) 1 LBA 1 7 6 5 4 Drive Cylinder High (LBA 23-16) Cylinder Low (LBA 15-8) Sector Number (LBA 7-0) X X 3 2 1 0
22H or 23H Head (LBA 27-24
The Read Long command performs similarly to the Read Sector(s) command except that it returns 516 Bytes of data instead of 512 Bytes. During a Read Long command, the CompactFlash card does not check the ECC bytes to determine if there has been a data error. Only single sector read long operations are supported. The transfer consists of 512 Bytes of data transferred in Word-Mode followed by 4 Bytes of ECC data transferred in Byte-Mode. This command has the same protocol as the Read Sector(s) command. Use of this command is not recommended. 3.2.1.12 Read Sector(s) - 20H or 21H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) 1 LBA 1 7 6 5 4 Drive Cylinder High (LBA 23-16) 3 2 1 0
20H or 21H Head (LBA 27-24)
Cylinder Low (LBA 15-8)
Sector Number (LBA 7-0) X X
This command reads from 1 to 256 sectors as specified in the Sector Count register. A sector count of 0 requests 256 sectors. The transfer begins at the sector specified in the Sector Number Register. When this command is issued and after each sector of data (except the last one) has been read by the host, the CompactFlash card sets BSY, puts the sector of data in the buffer, sets DRQ, clears BSY, and generates an interrupt. The host then reads the 512 Bytes of data from the buffer. At command completion, the Command Block Registers contain the cylinder, head and sector number of the last sector read. If an error occurs, the read terminates at the sector where the error occurred. The Command Block Registers contain the cylinder, head, and sector number of the sector where the error occurred. The flawed data is pending in the sector buffer.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 3.2.1.13 Read Verify Sector(s) - 40H or 41H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) 1 LBA 1 7 6 5 4 Drive Cylinder High (LBA 23-16) Cylinder Low (LBA 15-8) Sector Number (LBA 7-0) Sector Count X 3 2 1 0
40H or 41H Head (LBA 27-24)
This command is identical to the Read Sectors command, except that DRQ is never set and no data is transferred to the host. When the command is accepted, the CompactFlash card sets BSY. When the requested sectors have been verified, the CompactFlash card clears BSY and generates an interrupt. Upon command completion, the Command Block Registers contain the cylinder, head, and sector number of the last sector verified. If an error occurs, the verify terminates at the sector where the error occurs. The Command Block Registers contain the cylinder, head and sector number of the sector where the error occurred. The Sector Count Register contains the number of sectors not yet verified. 3.2.1.14 Recalibrate - 1XH
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) 1 LBA 1 Drive X X X X X 7 6 5 4 1XH X 3 2 1 0
This command is effectively a NOP command to the CompactFlash card and is provided for compatibility purposes. 3.2.1.15 Request Sense - 03H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) 1 X 1 Drive X X X X X 7 6 5 4 03H X 3 2 1 0
This command requests extended error information for the previous command. Table 3-9 defines the valid extended error codes for the CompactFlash card Series product. The extended error code is returned to the host in the Error Register.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet TABLE
00H 01H 09H 20H 21H 2FH 35H, 36H 11H 18H 05H, 30-34H, 37H, 3EH 10H, 14H 3AH 1FH 0CH, 38H, 3BH, 3CH, 3FH 03H
3-9: EXTENDED ERROR CODES
Description No Error Detected Self Test OK (No Error) Miscellaneous Error Invalid Command Invalid Address (Requested Head or Sector Invalid) Address Overflow (Address Too Large) Supply or generated Voltage Out of Tolerance Uncorrectable ECC Error Corrected ECC Error Self Test or Diagnostic Failed ID Not Found Spare Sectors Exhausted Data Transfer Error / Aborted Command Corrupted Media Format Write / Erase Failed
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Extended Error Code
3.2.1.16 Seek - 7XH
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) 1 LBA 1 Drive Cylinder High (LBA 23-16) Cylinder Low (LBA 15-8) X (LBA 7-0) X X 7 6 5 4 7XH Head (LBA 27-24) 3 2 1 0
This command is effectively a NOP command to the CompactFlash card although it does perform a range check of cylinder and head or LBA address and returns an error if the address is out of range. 3.2.1.17 Set Features - EFH
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) X Drive X X X Config Feature 7 6 5 4 EFH X 3 2 1 0
This command is used by the host to establish or select certain features. Table 3-10 defines all features that are supported.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet TABLE 3-10: FEATURES SUPPORTED
Feature 01H 55H 66H 69H 81H 96H 97H 9AH BBH CCH Operation Enable 8-bit data transfers. Disable Read Look Ahead. Disable Power on Reset (POR) establishment of defaults at Soft Reset. NOP - Accepted for backward compatibility. Disable 8-bit data transfer. NOP - Accepted for backward compatibility. Accepted for backward compatibility. Use of this Feature is not recommended. NOP- accepted for compatibility. 4 Bytes of data apply on Read/Write Long commands. Enable Power on Reset (POR) establishment of defaults at Soft Reset.
T3-10.0 375
Features 01H and 81H are used to enable and clear 8-bit data transfer modes in True IDE Mode. If the 01H feature command is issued all data transfers will occur on the low order D7-D0 data bus and the IOIS16 signal will not be asserted for data register accesses. Features 55H and BBH are the default features for the CompactFlash card; thus, the host does not have to issue this command with these features unless it is necessary for compatibility reasons. Features 66H and CCH can be used to enable and disable whether the Power On Reset (POR) Defaults will be set when a soft reset occurs. The default setting is to revert to the POR defaults when a soft reset occurs. 3.2.1.18 Set Multiple Mode - C6H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) X Drive X X X Sector Count X 7 6 5 4 C6H X 3 2 1 0
This command enables the CompactFlash card to perform Read and Write Multiple operations and establishes the block count for these commands. The Sector Count Register is loaded with the number of sectors per block. Upon receipt of the command, the CompactFlash card sets BSY to 1 and checks the Sector Count Register. If the Sector Count Register contains a valid value and the block count is supported, the value is loaded for all subsequent Read Multiple and Write Multiple commands and execution of those commands is enabled. If a block count is not supported, an Aborted Command error is posted, and Read Multiple and Write Multiple commands are disabled. If the Sector Count Register contains 0 when the command is issued, Read and Write Multiple commands are disabled. At power on, or after a hardware or (unless disabled by a Set Feature command) software reset, the default mode is Read and Write Multiple disabled.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 3.2.1.19 Set Sleep Mode- 99H or E6H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) X 7 6 5 4 Drive X X X X X 3 2 X 1 0
99H or E6H
This command causes the CompactFlash card to set BSY, enter the Sleep mode, clear BSY and generate an interrupt. Recovery from sleep mode is accomplished by simply issuing another command (a reset is permitted but not required). Sleep mode is also entered when internal timers expire so the host does not need to issue this command except when it wishes to enter Sleep mode immediately. The default value for the timer is 15 milliseconds. 3.2.1.20 Standby - 96H or E2H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) X 7 6 5 4 Drive X X X X X 3 2 X 1 0
96H or E2H
This command causes the CompactFlash card to set BSY, enter the Sleep mode (which corresponds to the ATA "Standby" Mode), clear BSY and return the interrupt immediately. Recovery from sleep mode is accomplished by simply issuing another command (a reset is not required). 3.2.1.21 Standby Immediate - 94H or E0H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) X 7 6 5 4 Drive X X X X X 3 2 X 1 0
94H or E0H
This command causes the CompactFlash card to set BSY, enter the Sleep mode (which corresponds to the ATA "Standby" Mode), clear BSY and return the interrupt immediately. Recovery from sleep mode is accomplished by simply issuing another command (a reset is not required).
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 3.2.1.22 Translate Sector - 87H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) 1 LBA 1 Drive Cylinder High (LBA 23-16 Cylinder Low (LBA 15-8) Sector Number (LBA 7-0) X X 7 6 5 4 87H Head (LBA 27-24) 3 2 1 0
This command allows the host a method of determining the exact number of times a user sector has been erased and programmed. The controller responds with a 512 Byte buffer of information containing the desired cylinder, head and sector, including its Logical Address, and the Hot Count, if available, for that sector. Table 3-11 represents the information in the buffer. Please note that this command is unique to the CompactFlash card. TABLE 3-11: TRANSLATE SECTOR INFORMATION
Address 00H-01H 02H 03H 04H-06H 07H-12H 13H 14H - 17H 18H-1AH 1BH-1FFH Information Cylinder MSB (00), Cylinder LSB (01) Head Sector LBA MSB (04) - LSB (06) Reserved Erased Flag (FFH) = Erased; 00H = Not Erased Reserved Hot Count MSB (18) - LSB (1A)1 Reserved
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1. A value of 0 indicates Hot Count is not supported.
3.2.1.23 Wear Level - F5H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) X X X Drive X X X Completion Status X 7 6 5 4 F5H Flag 3 2 1 0
This command is effectively a NOP command and only implemented for backward compatibility. The Sector Count Register will always be returned with an 00H indicating Wear Level is not needed.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 3.2.1.24 Write Buffer - E8H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) X X X Drive X X X Completion Status X 7 6 5 4 E8H Flag 3 2 1 0
The Write Buffer command enables the host to overwrite contents of the CompactFlash Card's sector buffer with any data pattern desired. This command has the same protocol as the Write Sector(s) command and transfers 512 Bytes. 3.2.1.25 Write Long Sector - 32H or 33H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) 1 LBA 1 7 6 5 4 Drive Cylinder High (LBA 23-16) Cylinder Low (LBA 15-8) Sector Number (LBA 7-0) X X 3 2 1 0
32H or 33H Head (LBA 27-24)
This command is similar to the Write Sector(s) command except that it writes 516 Bytes instead of 512 Bytes. Only single sector Write Long operations are supported. The transfer consists of 512 Bytes of data transferred in Word-Mode followed by 4 Bytes of ECC transferred in Byte-Mode. Because of the unique nature of the solid-state CompactFlash card, the 4 Bytes of ECC transferred by the host may be used by the CompactFlash card. The CompactFlash card may discard these 4 Bytes and write the sector with valid ECC data. This command has the same protocol as the Write Sector(s) command. Use of this command is not recommended.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 3.2.1.26 Write Multiple Command - C5H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) X LBA X Drive Cylinder High Cylinder Low Sector Number Sector Count X 7 6 5 4 C5H Head 3 2 1 0
Note: The current revision of the SST CompactFlash card can support up to a block count of 1 as indicated in the Identify Drive Command information
This command is similar to the Write Sectors command. The CompactFlash card sets BSY within 400 ns of accepting the command. Interrupts are not presented on each sector but on the transfer of a block which contains the number of sectors defined by Set Multiple. Command execution is identical to the Write Sectors operation except that the number of sectors defined by the Set Multiple command is transferred without intervening interrupts. DRQ qualification of the transfer is required only at the start of the data block, not on each sector. The block count of sectors to be transferred without intervening interrupts is programmed by the Set Multiple Mode command, which must be executed prior to the Write Multiple command. When the Write Multiple command is issued, the Sector Count Register contains the number of sectors (not the number of blocks or the block count) requested. If the number of requested sectors is not evenly divisible by the sector/block, as many full blocks as possible are transferred, followed by a final, partial block transfer. The partial block transfer is for n sectors, where: n = remainder(sector count/block count) If the Write Multiple command is attempted before the Set Multiple Mode command has been executed or when Write Multiple commands are disabled, the Write Multiple operation will be rejected with an aborted command error. Errors encountered during Write Multiple commands are posted after the attempted writes of the block or partial block transferred. The Write command ends with the sector in error, even if it is in the middle of a block. Subsequent blocks are not transferred in the event of an error. Interrupts are generated when DRQ is set at the beginning of each block or partial block. The Command Block Registers contain the cylinder, head and sector number of the sector where the error occurred and the Sector Count Register contains the residual number of sectors that need to be transferred for successful completion of the command e.g. each block has 4 sectors, a request for 8 sectors is issued and an error occurs on the third sector. The Sector Count Register contains 6 and the address is that of the third sector.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 3.2.1.27 Write Multiple without Erase - CDH
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) X LBA X Drive Cylinder High Cylinder Low Sector Number Sector Count X 7 6 5 4 CDH Head 3 2 1 0
This command is similar to the Write Multiple command with the exception that an implied erase before write operation is not performed. The sectors should be pre-erased with the Erase Sector(s) command before this command is issued. 3.2.1.28 Write Sector(s) - 30H or 31H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) 1 LBA 1 7 6 5 4 Drive Cylinder High (LBA 23-16) Cylinder Low (LBA 15-8) Sector Number (LBA 7-0) X X 3 2 1 0
30H or 31H Head (LBA 27-24)
This command writes from 1 to 256 sectors as specified in the Sector Count Register. A sector count of zero requests 256 sectors. The transfer begins at the sector specified in the Sector Number Register. When this command is accepted, the CompactFlash card sets BSY, then sets DRQ and clears BSY, then waits for the host to fill the sector buffer with the data to be written. No interrupt is generated to start the first host transfer operation. No data should be transferred by the host until BSY has been cleared by the host. For multiple sectors, after the first sector of data is in the buffer, BSY will be set and DRQ will be cleared. After the next buffer is ready for data, BSY is cleared, DRQ is set and an interrupt is generated. When the final sector of data is transferred, BSY is set and DRQ is cleared. It will remain in this state until the command is completed at which time BSY is cleared and an interrupt is generated. If an error occurs during a write of more than one sector, writing terminates at the sector where the error occurs. The Command Block Registers contain the cylinder, head and sector number of the sector where the error occurred. The host may then read the command block to determine what error has occurred, and on which sector.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 3.2.1.29 Write Sector(s) without Erase - 38H
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) 1 LBA 1 Drive Cylinder High (LBA 23-16) Cylinder Low (LBA 15-8) Sector Number (LBA 7-0) X X 7 6 5 4 38H Head (LBA 27-24) 3 2 1 0
This command causes the CompactFlash card to set BSY, enter the Idle mode, clear BSY and generate an interrupt. If the sector count is non-zero, it is interpreted as a timer count with each count being 5 milliseconds and the automatic power down mode is enabled. If the sector count is zero, the automatic power down mode is also enabled, the timer count is set to 3, with each count being 5 ms. Note that this time base (5 msec) is different from the ATA specification. 3.2.1.30 Write Verify - 3CH
Bit -> Command (7) C/D/H (6) Cyl High (5) Cyl Low (4) Sec Num (3) Sec Cnt (2) Feature (1) 1 LBA 1 Drive Cylinder High (LBA 23-16) Cylinder Low (LBA 15-8) Sector Number (LBA 7-0) X X 7 6 5 4 38H Head (LBA 27-24) 3 2 1 0
This command is similar to the Write Sector(s) command, except each sector is verified immediately after being written. This command has the same protocol as the Write Sector(s) command.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet 3.2.2 Error Posting The following table summarizes the valid status and error value for all the CF-ATA Command set. TABLE 3-12: ERROR
Command Check Power Mode Execute Drive Format Track Identify Drive Idle Idle Immediate Initialize Drive Parameters Read Buffer Read Multiple Read Long Sector Read Sector(s) Read Verify Sectors Recalibrate Request Sense Seek Set Features Set Multiple Mode Set Sleep Mode Stand By Stand By Immediate Translate Sector Wear Level Write Buffer Write Long Sector Write Multiple Write Multiple w/o Erase Write Sector(s) Write Sector(s) w/o Erase Write Verify Invalid Command Code
1. See Table 3-7 Note: V = valid on this command AND
STATUS REGISTER
Error Register BBK UNC IDNF ABRT V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V AMNF DRDY V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V Status Register DWF DSC V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V CORR ERR V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V
T3-12.0 375
Diagnostic1
Erase Sector(s)
(c)2001 Silicon Storage Technology, Inc.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet
4.0 APPENDIX 4.1 Differences between CF-ATA and PC Card-ATA/True IDE
This section details differences between CF-ATA vs. PC Card ATA and the differences between CF-ATA vs. True IDE. 4.1.1 Electrical Differences 4.1.1.1 TTL Compatibility CF is not TTL compatible, it is a purely CMOS interface. Refer to section 2.3.2 of this specification. 4.1.1.2 Pull Up Resistor Input Leakage Current The minimum pull up resistor input leakage current is 50K ohms rather than the 10K ohms stated in the PCMCIA specification. 4.1.2 Functional Differences 4.1.2.1 Additional Set Features Codes in CF-ATA The following Set Features codes are not PC Card ATA or True IDE, but provide additional functionality in CF-ATA. * * * * 69H, Accepted for backward compatibility 96H, Accepted for backward compatibility 97H, Accepted for backward compatibility 9AH, Set the host current source capability
4.1.2.2 Additional Commands in CF-ATA The following commands are not standard PC Card ATA commands, but provide additional functionality in CF-ATA. The command codes for the commands below are defined as vendor unique in PC Card ATA/True IDE. * C0H, Erase Sectors * 87H, Translate Sector * F5H, Wear Level The command codes for the commands below are defined as reserved in PC Card ATA/True IDE: * * * 03H, Request Sense 38H, Write Without Erase CDH, Write Multiple Without Erase
4.1.2.3 Idle Timer The Idle timer uses an incremental value of 5 ms, rather than the 5 sec minimum increment value specified in PC Card ATA/True IDE. 4.1.2.4 Recovery from Sleep Mode For CF devices, recovery from sleep mode is accomplished by simply issuing another command to the device. A hardware or software reset is not required.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet
5.0 PHYSICAL DIMENSIONS
TABLE 5-1: TYPE I COMPACTFLASH STORAGE CARD PHYSICAL SPECIFICATIONS
Length: 36.4 0.15 mm (1.433 .006 in.) Width: 42.80 0.10 mm (1.685 .004 in.) Thickness: 3.3 mm 0.10 mm (.130 .004in.) (Including Label Area)
T5-1.0 375
1.60mm .05 (.063 in. .002) 3.30mm .10 (.130 in. .004)
26 1 1.01mm .07 (.039 in. .003)
50 25 1.01mm .07 (.039 in. .003)
.99mm .05 (.039 in. .002) 2.44mm .07 (.096 in. .003) Optional Configuration (See note.) 2.15mm .07 (.085 in. .003) 1.433.006 (36.40)
2X 12.00mm .10 (2X .472 in. .004)
2X 25.78mm .07 (2X .1.015 in. .003)
P TO
2X 3.00mm .07 (2X .118 in. .003)
0.76mm .07 (.030 in. .003)
41.66mm .13 (1.640 in. .005) 4X R 0.5mm .1 (4X R .020 in. .004) 42.80mm .10 (1.685 in. .004)
0.63mm .07 (.025 in. .003)
375 ILL5-1.0
Note: The optional notched configuration was shown in the CF Specification Rev. 1.0. In specification Rev. 1.2, the notch was removed for ease of tooling. This optional configuration can be used but it is not recommended.
FIGURE
5-1: TYPE 1 COMPACTFLASH CARD DIMENSIONS
(c)2001 Silicon Storage Technology, Inc.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet
6.0 PRODUCT ORDERING INFORMATION
SST 48 CF XX XX 192 XXX - C1 XX
Card Thickness Code 1 = 3.3 mm Operating Temperature C = Commercial: 0C to +70C Device Density 008 = 8 MByte 016 = 16 MByte 024 = 24 MByte 032 = 32 MByte 048 = 48 MByte 064 = 64 MByte 096 = 96 MByte 128 = 128 MByte 192 = 192 MByte 256 = 256 MByte Device Family ATA/IDE Standard CompactFlash Card
6.1 Valid combinations
SST48CF008-C1 SST48CF016-C1 SST48CF024-C1 SST48CF032-C1 SST48CF048-C1 SST48CF064-C1 SST48CF096-C1 SST48CF128-C1 SST48CF192-C1 SST48CF256-C1
Note: Valid combinations are those products in mass production or will be in mass production. Consult your SST sales representative to confirm availability of valid combinations and to determine availability of new combinations.
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CompactFlash Card SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
Data Sheet
7.0 LIMITED WARRANTY
SST warrants all products against non-conformances in materials and workmanship for a period of one year from the delivery date of subject products. SST's liability is limited to replacing or repairing the product if it has been paid for. SST's warranties will not be affected by rendering of technical advice in connection with the order of products furnished hereunder. Except as expressly provided above, SST makes no warranties, express or implied, including without limitation any warranty of merchantability or fitness for a particular purpose. In no event shall SST be liable for any incidental or consequential damages with respect to the products purchased hereunder. SST reserves the right to discontinue production or change specifications or change prices at any time and without notice. The information in this publication is believed to be accurate in all respects at the time of publication, but is subject to change without notice. SST assumes no responsibility for any errors or omissions, and disclaims responsibility for any consequences resulting from the use of the information provided herein. SST assumes no responsibility for the use of any circuitry other than circuitry embodied in an SST product; no other circuits, patents, or licenses are implied. SST assumes no responsibility for the functioning of features or parameters not described herein.
9.0 PCMCIA STANDARD
CompactFlash memory cards are fully electrically compatible with the PCMCIA specifications listed below. These specifications may be obtained from: PCMCIA 2635 North First St. Ste. 209 San Jose, CA 95131 USA Phone: 408-433-2273 Fax: 408-433-9558 1. PCMCIA PC Card Standard, March 1997 2. PCMCIA PC Card ATA Specification, March 1997
10.0 COMPACTFLASH SPECIFICATION
CompactFlash memory Cards are fully compatible with the CompactFlash Specification published by the CompactFlash Association. Contact the CompactFlash Association for more information. CompactFlash Association P.O. Box 51537 Palo Alto, CA 94303 USA Phone: 415-843-1220 Fax: 415-493-1871 www.compactflash.org
7.1 Life Support Policy
SST's products are not authorized for use as critical component in life support devices or systems. Life support devices or systems are devices or systems that, (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. A critical component is any component of a life support device or system whose failure to perform can be expected to cause the failure of the life support device or system, or the affect its safety or effectiveness.
11.0 RELATED DOCUMENTS
American National Standard X3.221 AT Attachment for Interface for Disk Drives Document This document can be ordered from Global Engineering Documents by calling: 1-800-854-7179
8.0 PATENT PROTECTION
SST products are protected by assigned U.S. and foreign patents.
Silicon Storage Technology, Inc. * 1171 Sonora Court * Sunnyvale, CA 94086 * Telephone 408-735-9110 * Fax 408-735-9036 www.SuperFlash.com or www.ssti.com
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